參數(shù)資料
型號: PSD4235G2-90UT
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 256K X 16 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝: PLASTIC, TQFP-80
文件頁數(shù): 1/100頁
文件大?。?/td> 933K
代理商: PSD4235G2-90UT
1/100
March 2004
PSD4235G2
Flash In-System Programmable (ISP)
for 16-bit MCUs (5V Supply)
FEATURES SUMMARY
DUAL BANK FLASH MEMORIES
4 Mbit of Primary Flash Memory (8
uniform sectors, 32K x 16)
256 Kbit Secondary Flash Memory with 4
sectors
Concurrent operation: read from one
memory while erasing and writing the
other
64 Kbit SRAM (BATTERY BACKED)
PLD WITH MACROCELLS
Over 3000 Gates of PLD: CPLD and
DPLD
CPLD with 16 Output Macrocells (OMCs)
and 24 Input Macrocells (IMCs)
DPLD - user defined internal chip select
decoding
SEVEN L/O PORTS WITH 52 I/O PINS
52 individually configurable I/O port pins
that can be used for the following
functions:
MCU I/Os
–PLD I/Os
Latched MCU address output
Special function l/Os
l/O ports may be configured as open-drain
outputs
IN-SYSTEM PROGRAMMING (ISP) WITH
JTAG
Built-in JTAG compliant serial port allows
full-chip In-System Programmability
Efficient manufacturing allow easy
product testing and programming
Use low cost FlashLINK cable with PC
PAGE REGISTER
Internal page register that can be used to
expand the microcontroller address space
by a factor of 256
PROGRAMMABLE POWER MANAGEMENT
Figure 1. Package
HIGH ENDURANCE:
100,000 Erase/WRITE Cycles of Flash
Memory
1,000 Erase/WRITE Cycles of PLD
15 Year Data Retention
SINGLE SUPPLY VOLTAGE
5V ±10%
MEMORY SPEED
70ns Flash memory and SRAM access
time
TQFP80 (U)
80-lead, Thin,
Quad, Flat
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