參數(shù)資料
型號： PSD4235F3V-B-90JI
廠商： 意法半導體
英文描述： T499 Series - KEMET High Temperature (175C) Tantalum Chip Capacitor; Capacitance [nom]: 4.7uF; Working Voltage (Vdc)[max]: 20V; Capacitance Tolerance: +/-10%; Dielectric: Tantalum, Solid; ESR: 3.5Ω; Lead Style: Surface-Mount Chip; Lead Dimensions: 3528-21; Termination: 100% Tin (Sn); Body Dimensions: 3.5mm x 2.8mm x 1.9mm; Temperature Range: -55C to +175C; Container: Tape & Reel; Qty per Container: 2,000; Features: High Temperature
中文描述： Flash在系統(tǒng)可編程外設的16位微控制器
文件頁數(shù)： 36/93頁
文件大小： 503K
代理商： PSD4235F3V-B-90JI
Preliminary Information
PSD4000 Series
33
The
PSD4000
Functional
Blocks
(cont.)
9.2.1 Decode PLD (DPLD)
The DPLD, shown in Figure 10, is used for decoding the address for internal components.
The DPLD can generate the following decode signals:
8 sector selects for the main Flash memory (three product terms each)
4 sector selects for the Secondary Flash memory (three product terms each)
1 internal SRAM select (three product terms)
1 internal CSIOP select (select PSD registers, one product term)
Inputs to the DPLD chip selects may include address inputs, Page Register inputs and
other user defined external inputs from Ports A, B, C, D or F.
9.2.2 General Purpose PLD (GPLD)
The General Purpose PLD implements user defined system combinatorial logic function
or chip selects for external devices. Figure 11 shows how the GPLD is connected to the
I/O Ports. The GPLD has 24 outputs and each are routed to a port pin. The port pin can
also be configured as input to the GPLD. When it is not used as GPLD output or input, the
pin can be configured to perform other I/O functions.
All GPLD outputs are identical except in the number of available product terms (PTs) for
logic implementation. Select the pin that can best meet the PT requirement of your logic
function or chip select. In general, a PT is consumed for each logic
“
OR
”
function that you
specify in PSDsoft. However, certain logic functions can consume more than one PT even
if no logic
“
OR
”
is specified (such as specifying an address range with boundaries of high
granularity).
Table 13 shows the number of
“
native
”
PTs for each GPLD output pin. A native PT means
that a particular PT is dedicated to an output pin. For example, Table 13 shows that PSD
Port A pin PA0 has 3 native product terms. This means a guaranteed minimum of 3 PTs is
available to implement logic for that pin.
PSD silicon and PSDsoft can include additional PTs beyong the native PTs to implement
logic. This is a transparent operation that occurs as needed through PT expansion
(internal feedback) or PT allocation (internal borrowing). You may notice in the fitter report
generated by PSDsoft that for a given GPLD output pin, more PTs were used to implement
logic than the number of native PTs available for that pin. This is because PSDsoft has
called on unused PTs from other GPLD output pins to make your logic design fit (PT
allocation or PT expansion). For optimum results, choose a GPLD output pin with a large
number of native PTs for complicated logic.
GPLD Output on Port Pin
Number of Native
Product Terms
3
9
4
7
1
Port A, pins PA0-3
Port A, pins PA4-7
Port B, pins PB0-3
Port B, pins PB4-7
Port C, pins PC0-7
Table 13. GPLD Product Term Availability
相關PDF資料
PDF描述
PSD4235F3V-B-90M Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F3V-C-15B81 Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F3V-C-15B81I Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F3V-C-15J Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F3V-C-15JI Flash In-System-Programmable Peripherals for 16-Bit MCUs
相關代理商/技術參數(shù)
參數(shù)描述
PSD4235G2-70U 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2-90UI 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2V-12UI 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2V-90U 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*