參數(shù)資料
型號(hào)： PSD413A1
廠商： 意法半導(dǎo)體
英文描述： Low Cost Field Programmable Microcontroller Peripherals
中文描述： 低成本現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備
文件頁數(shù)： 46/123頁
文件大?。?/td> 657K
代理商： PSD413A1
9.2.5 Optional Features
The PSD4XX provides two optional features to add flexibility to the Bus Interface:
1. Address In
Port A can be configured as high order address (A16-A23) inputs to the ZPLD for
EPROM or other decoding. Inputs are latched by ALE/AS if Multiplexed Bus is selected.
Other Ports can be configured as address input ports for the ZPLD. These inputs should
not be used for EPROM decoding and are not latched internally.
2. Address Out
For multiplexed bus only. Latched address lines A0-A15 are available on
Port A, B, C or D.
Details on the optional features are described in the I/O Port section.
9.2.6 Bus Interface Examples
The next four figures show the PSD4XX interfacing with some popular microcontrollers.
The examples show only the basic bus connections; some of the pin names on the
PSD4XX parts change to reflect the actual pin functions.
Figure 23 shows the interface to the 80C31. The 80C31 has a 16 bit address bus and an
8-bit data bus. The lower address byte is multiplexed with the data bus. The RD and WR
signals are used for accessing the data memory (SRAM) and the PSEN signal is for
reading program memory (EPROM). The ALE signal is active high and is used to latch the
address internally. Port C provides latched address outputs A[7:0]. Ports A, B, D, and E
(PE2-PE7) can be configured to perform other functions. The RSTOUT reset to the 80C31
is generated by the ZPLD from the RESET input. This configuration eliminates any reset
race condition between the 80C31 and the PSD4XX.
Figure 24 shows the 68HC11 interface, which is similar to the 80C31 except the PSD4XX
generates internal RD and WR from the 68HC11’s E and R/W signals.
In Figure 25, the Intel 80C196 microcontroller is interfaced to the PSD4XX. The 80C196
has a multiplexed 16-bit address and data bus. The BHE signal is used for data byte
selection. Ports C and D are used as output ports for latched address A[15:0]. Pins PE6
and PE7 can be programmed as ZPLD outputs to provide the READY and BUSWIDTH
control signals to the 80C196.
Figure 26 shows Motorola’s MC68331 interfacing to the PSD4XX. The MC68331 has a
16-bit data bus and a 24-bit address bus. D15 – D8 from the MC68331 are connected to
Port D, and D7 – D0 are connected to Port C.
PSD4XX Famly
43
The PSD4XX
Architecture
(cont.)
相關(guān)PDF資料
PDF描述
PSD402A1 Low Cost Field Programmable Microcontroller Peripherals
PSD411A2 Low Cost Field Programmable Microcontroller Peripherals
PSD413A2 Low Cost Field Programmable Microcontroller Peripherals
PSD412A1-C-70U Low Cost Field Programmable Microcontroller Peripherals
PSD402A1-C-90JI Low Cost Field Programmable Microcontroller Peripherals
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD413A2-C-70L 制造商:WSI 功能描述:
PSD4-16 制造商:Tamura Corporation of America 功能描述:
PSD4-20 制造商:MICROTRAN 功能描述:POWER TRANSFORMER, 6 VA
PSD4235G2-70U 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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