參數(shù)資料
型號： PSD4135F2-B-15M
廠商： 意法半導(dǎo)體
英文描述： Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked
中文描述： Flash在系統(tǒng)可編程外設(shè)的16位微控制器
文件頁數(shù)： 55/93頁
文件大?。?/td> 503K
代理商： PSD4135F2-B-15M
PSD4000 Series
Preliminary Information
52
The
PSD4000
Functional
Blocks
(cont.)
9.4.5 Ports A, B and C – Functionality and Structure
Ports A and B have similar functionality and structure, as shown in Figure 21. The two
ports can be configured to perform one or more of the following functions:
J
MCU I/O Mode
J
GPLD Output
–
Combinatorial PLD outputs.
J
PLD Input
–
Input to the PLDs.
J
Address In
–
Additional high address inputs may be latched by ALE.
J
Open Drain/Slew Rate
–
pins PC[7:0]can be configured to fast slew rate,
pins PA[7:0] and PB[7:0] can be configured to Open Drain
Mode.
I
DATA OUT
REG.
D
Q
D
Q
WR
WR
READ MUX
GPLD OUTPUT
P
D
B
PLD INPUT
DIR REG.
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
PORT PIN
DATA OUT
Figure 21. Port A, B and C
相關(guān)PDF資料
PDF描述
PSD4135F2-B-15MI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F2-B-15U Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F2-B-15UI Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.1uF; Working Voltage (Vdc)[max]: 25V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked
PSD4135F2-B-20B81 Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.1uF; Working Voltage (Vdc)[max]: 25V; Capacitance Tolerance: +/-2%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked
PSD4135F2-B-20B81I Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.1uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD4135F2-B-15MI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F2-B-15U 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F2-B-15UI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F2-B-20B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F2-B-20B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
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