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| 型號： | PSD402A2 |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有59個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，40余個可編程輸入/輸出，通用PLD的有59個輸入） |
| 文件頁數(shù)： | 36/97頁 |
| 文件大?。?/td> | 309K |
| 代理商： | PSD402A2 |
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PSD4XX Famly
4-36
Bus
Interface
The Bus Interface is very flexible and can be configured to interface to most microcontrollers
with no glue logic. Table 5 lists some of the bus types to which the Bus Interface is able to
interface.
Multiplexed
Data Bus
Width
Bus Control
Signals
Microcontroller
Mux
8
WR, RD, PSEN, A0
8031
Mux/
Non-mux
8/16
R/W, E, BHE, A0
6811
Mux
8/16
WR, RD, BHE, A0
80196/80186
Mux
16
WRL, RD, WRH, A0
80196SP
Non-mux
16
R/W, LDS, UDS
68302
Non-mux
8/16
R/W, DS, SIZ0, A0
68340
Non-mux
16
R/W, DS, BHE, BLE
68330
Table 5. Typical Microcontroller Bus Types
Bus Interface Configuration
The Bus Interface Logic is user configurable. The type of bus interface is specified by
the user in the PSDsoft software (PSD configuration). The bus control input pins have
multi-function capabilities. By choosing the right configuration, the PSD4XX is able to
interface to most microcontrollers, including the ones listed in Table 5. In Table 6, the names
of the bus control input signal pins and their multiple functions are shown. For example, Pin
PE0 can be configured by the PSD configuration software to perform any one of the five
functions. Examples on the interface between the PSD4XX and some typical microcon-
trollers are shown in following sections.
Pin
Pin
Pin
Pin
Pin
Pin Name
Function
1
RD
Function
2
E
Function
3
DS
Function
4
LDS
Function
5
RD
WR
WR
R/W
WRL
PE0
BHE
PSEN
WRH
UDS
SIZ0
PE1
ALE
AD0
A0
BLE
Table 6. Alternate Pin Functions
PSD4XX Interface To a Multiplexed Bus
Figure 19 shows a typical connection to a microcontroller with a multiplexed bus. The
ADIO port of the PSD4XX is connected directly to the microcontroller address/data bus
(AD0-AD15 for 16 bit bus). The ALE input signal latches the address lines internally. In a
read bus cycle, data is driven out through the ADIO Port transceivers after the specified
access time. The internal ADIO Port connection for a 16 bit multiplexed bus is shown in
Figure 20. The ADIO Port is in tri-state mode if none of the PSD4XX internal devices are
selected.
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PDF描述 |
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| PSD403A1 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有37個輸入) |
| PSD403A2 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有59個輸入) |
| PSD411A2 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有59個輸入) |
| PSD412A2 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有59個輸入) |
| PSD413A2 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有59個輸入) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD402A2-12J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD402A2-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD402A2-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD402A2-12U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD402A2-12UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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