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參數(shù)資料
| 型號(hào)： | PS4532 |
| 英文描述： | Analog | 17V Latched Triple SPDT |
| 中文描述： | 模擬| 17V的鎖存三SPDT |
| 文件頁(yè)數(shù)： | 8/15頁(yè) |
| 文件大小： | 431K |
| 代理商： | PS4532 |
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PS8445A 06/20/00
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PS4530A/PS4531A/PS4532A
Low ON Resistance 8-Channel, 2-Channel,
Latched Analog Multiplexers/Switches
Electrical Characteristics - Single 3V Supply
(V+ = +2.7V to 3.6V, V = 0V, GND = 0V, V
ADD_H
= V
EN_H
= V
LE
= 2.4V, V
ADD_L
= V
EN_L
= 0.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted)
Notes:
2.The algebraic convention, where the most negative value is a minimum and the most positive is a maximum,
is used in this data sheet.
3.
Guaranteed by design
4.
R
ΟΝ
=
R
ΟΝ
(max)
- R
ΟΝ
(min)
5.Flatness is defined as the difference between the maximum and minimum value of on-resistance measured over the specified
analog ranges, i.e., VNO = 3V to 0V and 0V to 3V.
6.Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at T
A
= +25oC.
7.Worst-case isolation is on channel 4 because of its proximity to the COM pin.
Off isolation = 20log V
COM
/V
NO
, V
COM
= output, V
NO
= input to off switch
8.Leakage testing at single supply is guaranteed by testing with dual supplies.
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