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| 型號(hào)： | PS4066EPD |
| 英文描述： | SPST Analog Switch |
| 中文描述： | SPST模擬開(kāi)關(guān) |
| 文件頁(yè)數(shù)： | 3/9頁(yè) |
| 文件大?。?/td> | 566K |
| 代理商： | PS4066EPD |
3
PS8184A 10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
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Electrical Specifications - Single +12V Supply
(continued)
(V+ = 12V ±10%, GND = 0V, V
INH
= 4V, V
INL
= 0.8V)
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4.
R
ΟΝ
=
R
ΟΝ
max
-
R
ΟΝ
min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oC.
7. Off Isolation = 20log
10
[ V
COM
/ (V
NO
or V
NO
)
], V
COM
= 0utput, V
NC
/V
NO
=
input to off switch
8. Between any two switches.
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