- IEEE 802.1q VLAN Support for Up to 16 Groups
(Full Range of VLAN IDs)
- VLAN ID Tag/Untag Options, Per Port Basis
- IEEE 802.1p/q Tag Insertion or Removal on a
Per Port Basis (Egress)
- Programmable Rate Limiting at the Ingress and
Egress on a Per Port Basis
- Broadcast Storm Protection with Percent Control (Global and Per Port Basis)
- IEEE 802.1d Rapid Spanning Tree Protocol
Support
- Tail Tag Mode (1 byte Added before FCS) Support at Port 3 to Inform the Processor whICh
Ingress Port Receives the Packet and its Priority
- Bypass Feature that Automatically Sustains the
Switch Function between Port 1 and Port 2
when CPU (Port 3 Interface) Goes to the Sleep
Mode
- Self-Address Filtering
- Individual MAC Address for Port 1 and Port 2
- Supports RMII Interface and 50 MHz Reference
Clock Output
- IGMP Snooping (IPv4) Support for Multicast
Packet Filtering
- IPv4/IPv6 QoS Support
- MAC Filtering Function to Forward Unknown
Unicast Packets to Specified Port
? Comprehensive Configuration Register Access
- Serial Management Interface (SMI) to All Internal Registers
- MII Management (MIIM) Interface to PHY Registers
- High Speed SPI and I2C Interface to All Internal
Registers
- I/O Pins Strapping and EEPROM to Program
Selective Registers in Unmanaged Switch