參數(shù)資料
型號: PPC5606BCLU48
廠商: Freescale Semiconductor
文件頁數(shù): 11/112頁
文件大?。?/td> 0K
描述: MCU 32BIT 1M 48MHZ
標準包裝: 40
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 48MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 149
程序存儲器容量: 1MB(1M x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 16
RAM 容量: 80K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 29x10b,5x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LQFP
包裝: 托盤
MPC5607B Microcontroller Data Sheet, Rev. 7
Revision history
Freescale Semiconductor
108
4
24 Aug 2010 Editorial changes and improvements.
Updated “Features“ section
Table 1: updated footnote concerning 208 MAPBGA
In the block diagram:
Added “5ch 12-bit ADC“ block.
Updated Legend.
Added “Interrupt request with wakeup functionality” as an input to the WKPU block.
Figure 2: removed alternate functions
Figure 3: removed alternate functions
Figure 4: removed alternate functions
Table 2: added contents concerning the following blocks: CMU, eDMA, ECSM, MC_ME,
MC_PCU, NMI, SSCM, SWT and WKPU
Added Section 3.2, Pin muxing
Section 4, Electrical characteristics: removed “Caution” note
Section 4.2, NVUSRO register: removed “NVUSRO[WATCHDOG_EN] field description“
section
Table 11: VIN: removed min value in “relative to VDD” row
TA C-Grade Part, TJ C-Grade Part, TA V-Grade Part, TJ V-Grade Part, TA M-Grade Part, TJ M-Grade Part:
added new rows
TVDD: contents merged into one row
VDD_BV: changed min value in “relative to VDD” row
power supply
Table 14: added RJB and RJC rows
Removed “208 MAPBGA thermal characteristics” table
Table 15: rewrote parameter description of WFI and WNFI
Removed IDYNSEG information
Updated “I/O supply segments” table
Table 22: removed IDYNSEG row
Added Table 23
Updated all values
Removed IVREGREF and IVREDLVD12 rows
Added the footnote “The duration of the in-rush current depends on the capacitance
placed on LV pins. BV decaps must be sized accordingly. Refer to IMREG value for
minimum amount of current to be provided in cc.” to the IDD_BV specification.
Updated VPORH min/max value
Updated VLVDLVCORL min value
Updated Table 27
Tdwprogram: added initial max value
Inserted Teslat row
Table 29: removed the “To be confirmed” footnote
In the “Crystal oscillator and resonator connection scheme” figure, removed RP.
Removed gmSXOSC row
ISXOSCBIAS: added min/typ/max value
Table 51. Revision history (continued)
Revision
Date
Substantive changes
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PPC5606BCLU64 功能描述:MCU 32BIT 1M 64MHZ RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:MPC56xx Qorivva 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C,智能卡,UART/USART,USB 外圍設(shè)備:LED,POR,WDT 輸入/輸出數(shù):9 程序存儲器容量:64KB(64K x 8) 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件
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