參數(shù)資料
型號(hào): PPC5604BCLL48
廠(chǎng)商: Freescale Semiconductor
文件頁(yè)數(shù): 36/109頁(yè)
文件大?。?/td> 0K
描述: MCU 32BIT 512K 48MHZ
標(biāo)準(zhǔn)包裝: 90
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 48MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 4K x 16
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 28x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤(pán)
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Package pinouts and signal descriptions
Freescale Semiconductor
32
3.12
Absolute maximum ratings
NOTE
Stresses exceeding the recommended absolute maximum ratings may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification are not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. During overload conditions (VIN >VDD or
VIN <VSS), the voltage on pins with respect to ground (VSS) must not exceed the
recommended values.
Table 11. Absolute maximum ratings
Symbol
Parameter
Conditions
Value
Unit
Min
Max
VSS
SR Digital ground on VSS_HV pins
0
V
VDD
SR Voltage on VDD_HV pins with respect to
ground (VSS)
0.3
6.0
V
VSS_LV SR Voltage on VSS_LV (low voltage digital
supply) pins with respect to ground
(VSS)
—VSS0.1 VSS+0.1 V
VDD_BV SR Voltage on VDD_BV pin (regulator
supply) with respect to ground (VSS)
0.3
6.0
V
Relative to VDD
0.3
VDD+0.3
VSS_ADC SR Voltage on VSS_HV_ADC (ADC
reference) pin with respect to ground
(VSS)
—VSS0.1 VSS+0.1 V
VDD_ADC SR Voltage on VDD_HV_ADC pin (ADC
reference) with respect to ground (VSS)
0.3
6.0
V
Relative to VDD
VDD 0.3 VDD+0.3
VIN
SR Voltage on any GPIO pin with respect to
ground (VSS)
0.3
6.0
V
Relative to VDD
—VDD+0.3
IINJPAD SR Injected input current on any pin during
overload condition
10
mA
IINJSUM SR Absolute sum of all injected input
currents during overload condition
50
IAVGSEG SR Sum of all the static I/O current within a
supply segment
VDD = 5.0 V ± 10%, PAD3V5V = 0
70
mA
VDD = 3.3 V ± 10%, PAD3V5V = 1
64
ICORELV SR Low voltage static current sink through
VDD_BV
——
150
mA
TSTORAGE SR Storage temperature
55
150
°C
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