參數(shù)資料
型號(hào)： PPC405EP-3LB133C
廠商： APPLIEDMICRO INC
元件分類： 微控制器/微處理器
英文描述： PowerPC 405EP Embedded Processor
中文描述： 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385
封裝： 31 X 31 MM, LEAD FREE, PLASTIC, EBGA-385
文件頁(yè)數(shù)： 48/50頁(yè)
文件大?。?/td> 373K
代理商： PPC405EP-3LB133C
PPC405EP – PowerPC 405EP Embedded Processor
48
AMCC
Revision 1.07 – September 10, 2007
Data Sheet
Initialization
The following describes the method by which initial chip settings are established when a system reset occurs.
Strapping
When the SysReset input is driven low (system reset), the state of certain I/O pins is read to enable default initial
conditions prior to PPC405EP start-up. The actual capture instant is the nearest system clock edge before the
deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down (logical 0)
resistors to select the desired default conditions. The recommended pull-up is 3k
Ω
to +3.3V or 10k
Ω
to +5V. The
recommended pull-down is 1K
Ω
to GND. These pins are use for strap functions only during reset. They are used
for other signals during normal operation. The following table lists the strapping pins along with their functions and
strapping options. The signal names assigned to the pins for normal operation appear below the pin number.
EEPROM
During reset, configuration values other than the internal default values can be read from a serial EEPROM
connected to the IIC port. The association of bits in the EEPROM with the configuration values and their default
values are covered in detail in the
PowerPC 405EP Embedded Processor User’s Manual
.
Note:
If P04 is strapped to 1, and the EEPROM is not connected or is defective, the PPC405EP remains in the
reset state and will not boot.
Table 16. Strapping Pin Assignments
Function
Option
Ball Strapping
P04
UART0_Tx
0
1
IIC EEPROM controller
If the controller is enabled, 32 bytes of configuration data
are read from the EEPROM.
Disable
Enable
EEPROM address (P04 = 1)
or
Boot ROM width (P04 = 0)
When P04 = 1, these pins set the high-order two
bits of the EEPROM base address.
When P04 = 0, these pins indicated the width of
the boot ROM.
N02
UART0_RTS
Y17
SysErr
High order EEPROM base address bits
Address bit
Address bit
8 bits
16 bits
reserved
reserved
0
0
1
1
0
1
0
1
相關(guān)PDF資料
PDF描述
PPC405EP-3LB133CZ PowerPC 405EP Embedded Processor
PPC405EP-3LB200C PowerPC 405EP Embedded Processor
PPC405EP-3LB200CZ PowerPC 405EP Embedded Processor
PPC405EP-3LB266C PowerPC 405EP Embedded Processor
PPC405EP-3LB266CZ PowerPC 405EP Embedded Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PPC405EP-3LB133CZ 制造商:AppliedMicro 功能描述:MPU 405EP RISC 32-Bit 0.18um 133MHz 3.3V 385-Pin EBGA T/R
PPC405EP-3LB200C 制造商:AppliedMicro 功能描述:AMCPPC405EP-3LB200C 32 Bit PowerPC
PPC405EP-3LB200CZ 制造商:AppliedMicro 功能描述:MPU 405EP RISC 32-Bit 0.18um 200MHz 3.3V 385-Pin EBGA T/R
PPC405EP-3LB266C 制造商:AppliedMicro 功能描述:MPU 405EP RISC 32-Bit 0.18um 266MHz 3.3V 385-Pin EBGA Tray 制造商:AMCC 功能描述:MPU 405EP RISC 32BIT 0.18UM 266MHZ 3.3V 385PIN EBGA - Trays 制造商:AMCC 功能描述:AMCPPC405EP-3LB266C 32BIT PPC UP TO 333M 制造商:Applied Micro Circuits Corporation 功能描述:MPU 405EP RISC 32-Bit 0.18um 266MHz 3.3V 385-Pin EBGA Tray
PPC405EP-3LB266CZ 制造商:AppliedMicro 功能描述:MPU 405EP RISC 32-Bit 0.18um 266MHz 3.3V 385-Pin EBGA T/R 制造商:AMCC 功能描述:AMCPPC405EP-3LB266CZ 32B MPU EOL040910
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