參數(shù)資料
型號: PowerPC 403GCX
廠商: IBM Microeletronics
英文描述: 32-Bit RISC Embedded Controller(32位精簡指令集嵌入式控制器)
中文描述: 32位RISC嵌入式控制器(32位精簡指令集嵌入式控制器)
文件頁數(shù): 1/2頁
文件大?。?/td> 70K
代理商: POWERPC 403GCX
Highlights
Bus Interface
Bus compatible with 403GA, 403GB
and 403GC
Direct-connect peripheral/SRAM/
ROM and DRAM interfaces
Support for 8-, 16- and 32-bit devices
Addressing for 512MB of main
storage
External bus master support
IEEE 1149.1 (JTAG) compatible
interface, for test, debug and
real-time trace support
DRAM Controller supports
EDO DRAM
Data bus parity on per byte basis
New programmable bus modes
DMA Controller
Four independent DMA channels
Buffered, fly-by, memory-to-memory,
and burst modes
Programmable for 8-, 16- and
32-bit transfers
Data chaining
Interrupt Controller
Low latency interrupt handling (three
cycles typical)
Six external interrupt inputs (five
regular, one critical)
Dual level interrupt structure for
robust debug
Power Management Capability
Dynamic power management and
stand-by mode
Support for connections to 3.3V and
5V peripherals
Instruction Fetch, Branch and
Dispatch Unit
Four instruction prefetch queue
Branch folding and static
branch prediction
Dispatches up to two instructions
per cycle
Memory Management Unit
MMU is precache (cache tags are
physical addresses)
8 page sizes (1K-16M by powers of 4)
for efficient system memory use
64 entry fully associative TLB with
software replacement
16 protection zones
Instruction and Data Caches
Separate caches:
16KB Instruction, 8KB Data
Two-way set-associative
Fetch-thru instruction cache
Write-back data cache
Timers
64-bit time base
32-bit programmable interval timer
Fixed interval timer for system
maintenance
Watchdog timer for system
error recovery
Serial Port
RS-232 serial communications
Programmable to 1.5 Mb/s
Product Description
The PowerPC 403GCX* 32-bit RISC
embedded controller is a clock-
doubled design and is pin-compatible
with the 403GA and 403GC. This
provides an easy upgrade path when
extra performance is needed.
The 403GCX processor core is tightly
coupled to the internal 16KB instruction
and 8KB data caches, reducing
overhead for data transfers to and from
main storage. Instruction queue logic
minimizes pipeline stalls by managing
branch prediction, branch folding and
instruction prefetching. The high-speed
multiplier can significantly improve
application performance.
PowerPC 403GCX power consumption
is minimized by a custom-designed
low-power circuit library, 3.3V
operation, and dynamic clocking. It is
binary compatible with all IBM
PowerPC microprocessors and
embedded controllers.
The 403GCX includes an integrated
MMU featuring a fully associative TLB.
Each entry provides a translation for a
memory page, which can be one of
several sizes. TLB replacement is
managed by software, which can
employ the optimum replacement
strategy for a particular application.
PowerPC 403GCX Embedded Controller
Highly integrated, low cost, and easily upgradeable
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