參數(shù)資料
型號(hào): PMB2401
廠商: SIEMENS AG
英文描述: GSM Receiver Circuit
中文描述: 手機(jī)接收電路
文件頁(yè)數(shù): 5/23頁(yè)
文件大?。?/td> 665K
代理商: PMB2401
Semiconductor Group
5
PMB 2401
Circuit Description
The input signal SI/SI and the amplified first local oscillator signal LO1/LO1 are mixed down to an
intermediate frequency (IF). The open collector output of the mixer generates a differential current
at pins MO/MO which is filtered by an external resonant circuit. The resulting voltage drives an
external SAW-filter.
The second local oscillator signal LO2 is generated in an on chip VCO and is fed to two dividers,
which generate orthogonal signals at a quarter of VCO-frequency. The internal LO-signal is fed to
an additionally divider, whose output signal LO2O is fed to the RF-signal of PLL-synthesizer. The
filtered IF-signal reenters the chip at the IFI/IFI input, where it is amplified and demodulated to the
final baseband output frequency with each of the orthogonal signals. The resulting in-phase and
quadrature signals pass through differential output drivers and appear at SOI/SOI and SOQ/SOQ
outputs, respectively. The amplification of the IF-signal before the second mixer stage is performed
by a gain-controlled amplifier, the gain being determined by the voltage at the gain control input GC.
Two differential operational amplifiers with the input signals INI/INI (INQ/INQ) and the output signals
OUTI/OUTI (OUTQ/OUTQ) can be used as active filters.
Differential signals and symmetrical circuitry are used throughout, except at the signal output. Bias
drivers generate internal temperature- and supply voltage-compensated reference voltages
required by various circuit blocks. Switching the power down inputs PD1 and PD2 from high to low
(
see table
) sets the circuit from its normal operating mode into a mode with reduced supply current.
PD1
PD2
RF-Part
IF-Part
VCO/Divders
L
L
OFF
OFF
ON
L
H
OFF
ON
ON
H
L
ON
OFF
ON
H
H
ON
ON
ON
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