參數(shù)資料
型號(hào): PMB2347
廠商: INFINEON TECHNOLOGIES AG
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 2800 MHz, PDSO20
封裝: PLASTIC, TSSOP-20
文件頁數(shù): 8/35頁
文件大?。?/td> 578K
代理商: PMB2347
Functional Description
3 - 9
PMB 2347
preliminary
Wireless Components
Specification, August 1999
4. Divide ratio programming
The frequency of an external VCO controlled by the PMB 2347 is given below:
with
.
fVCO:
frequency of the external VCO
fRI:
reference frequency
N:
divide ratio of the N-counter
A:
divide ratio of the A-swallow counter
P:
divide ratio of the prescaler
R:
divide ratio of the R-counter
M=P*N+A:
total divide ratio
Note:
for continous frequency steps following condition is necessary
5. Prescaler Divide Ratio
For the highest input frequencies of the prescalers the larger divide ratio is nec-
essary:
RF-PLL:
64/65 for frequencies greater 1500 MHz
IF-PLL:
16/17 for frequencies greater 375 MHz
6. Fast wake-up programming
When the circuit is connected to the supply voltage all registers are undefined.
Due to the fact that each counter is loading its new start value after it is decre-
mented to zero“, the start-up time of the counters with the programmed values
is too long for some applications. If the counters are programmed in standby
mode 2 and the PLLs are switched afterwards in operating mode, the counters
are starting immediatly with the programmed values. Therefore following data
transfer sequence is recommended:
Table 3-2 Fast Wake Up Data Transfer Sequence
Step
Serial Data Transfer Sequence
1
Long Control Word: Asynchronous Mode, Standby2
2
R-Counter
3
A-/N-Counter
4
Long Control Word: Synchronous Mode, Operating Mode
f
VC O
PN
() A
+
[]
f
RI
R
-------
M
R
----- f
RI
==
AN
PN
A
+
[] PP 1
()
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