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參數(shù)資料
| 型號(hào)： | PMB2306T |
| 廠商： | SIEMENS A G |
| 元件分類： | XO, clock |
| 英文描述： | PLL-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2 |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 120 MHz, PDSO14 |
| 文件頁數(shù)： | 8/35頁 |
| 文件大小： | 760K |
| 代理商： | PMB2306T |
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30%530%7
2YHUYLHZ
Semiconductor Group
8
02.97
12
13
14
15
MFO1
0XOWLIXQFWLRQ2XWSXW
for the signals
I
RN
,
Φ
V
,
Φ
VN
and port 1.
for the output signals
I
VN
,
Φ
RN
and the
input signal
,
REF
.
–
The signals
Φ
R
and
Φ
V
are the digital output signals of the
phase and frequency detector for use in external active
current sources (see phase detector output wave forms).
–
The signals
I
RN
and
I
VN
are the scaled down signals of the
reference frequency and VCO-frequency. The L-time
corresponds to 1/
I
RI
and 1/
I
FI
respectively.
–
In the port function the port 1 output signal is assigned to the
information of the status program. The output switches with
the rising edge of the
EN-signal. The standby mode does not affect the port
function.
–
In the internal charge pump mode the input signal
,
REF
determines the value of the PD-output current.
Reference current for charge pump
:
,
REF
= (
9
DD
–
9
REF
)/
R1
= 100
μ
A (tolerance of ±20% or less is recommended
)
R1:
see application circuit
9
MFO2
0XOWLIXQFWLRQ,23LQ
REF
:
see AC/DC characteristics
7DEOH
'62 76623 6\PERO )XQFWLRQ
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