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參數(shù)資料
| 型號(hào)： | PM8379 |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | 20-Port 4.25 Gbit/s FC-AL Cut-Through Switch |
| 中文描述： | 20端口4.25 Gbit / s的通過開關(guān)的FC - AL切 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 50K |
| 代理商： | PM8379 |
PM8379
CTS 20x4G
Advance
PMC-2031144
Issue 2
PROPRIETARY AND CONFIDENTIAL TO PMC
-
SIERRA, INC.,
AND FOR ITS CUSTOMERS’ INTERNAL USE
Copyright PMC-Sierra, Inc. 2004.
All rights reserved.
20-Port 4.25 Gbit/s FC-AL Cut-Through Switch
The CTS 20x4G is designed to interface
directly to Fibre Channel disk drives in a
storage array. It can interface directly to
optics or to cables at the ingress/egress
point of an enclosure and is able to
determine if an incoming frame is
destined for a drive within that enclosure.
After determining which port is
associated with the frames recipient, a
cut through operation to that port is
performed thereby significantly reducing
system latency and improving perfor-
mance.
The CTS 20x4G provides unique disk
isolation features that significantly
increase total system availability,
reliability, and serviceability.
FEATURES
GENERAL
20 independent rate selectable 1.0625,
2.125 or 4.25 Gbit/s physical
interfaces.
Register and software compatible to
the PM8368 PBC 18x2G, PM8369
PBC 18x4G, PM8372 PBC 4x2G and
PM8377 PBC 4x4G.
Compliant to FC jitter specifications on
a per-port basis.
Supports single-ended or differential
106.25 MHz reference clock.
Per port monitoring and diagnostics:
LPSM Monitoring on each port.
Disk isolation and per port serial
loopback.
Configurable Digital Loss of Link:
analog LOS Detect, 8B/10B
disparity errors/error rate, CRC
errors/error rate, word
synchronization error/error rate, and
compliant frequency of comma
patterns detected (configurable
thresholds for each with
corresponding pin interrupts).
Built-in self test capability with FC
Frame Generator/Comparator.
Supports a 106.25 MHz, 40-bit (20
receive + 20 transmit) DDR parallel
interface that acts as a 21st port. This
flexible interface enables external
functions such as enclosure
management or other user-proprietary
functions to be implemented using a
low cost FPGA.
CUT-THROUGH SWITCHING
Integrated cut-through switching and
arbitration management enables up to
200% improvement in EDR and IOPS.
Parallel arbitration supported with
arbitration priority and access fairness
preserved.
Automatic or CPU controlled
initialization of AL_PA table.
Supports dynamic half duplex, half/full
duplex operation, LPSM transfer state,
multicast/broadcast (OPNy).
BLOCK DIAGRAM
T
RX FIFO
RX FIFO
RX FIFO
RX FIFO
CTS Logic
JTAG
CONTROL
CDRU
TX FIFO
RDIN[0]
RDIP[0]
RDIN[1]
RDIP[1]
RDIN[19]
RDIP[19]
TDON[0]
TDOP[0]
CPU
T
T
T
T
T
C
F
R
R
R
E
D
M
M
T
R
D
I
D
D
R
P
T
M
B
O
TX FIFO
RXCLK
RXD[19:0]
R
Frame Generator
Frame Comparator
Arb
Mgmt
AL_PA
Table
Cut Thru
Mgmt
TX FIFO
TDON[1]
TDOP[1]
TDON[19]
TDOP[19]
TXD[19:0]
TXCLK
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