參數(shù)資料
型號(hào): PM75B4L1C060
廠商: POWEREX INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: AC MOTOR CONTROLLER, 75 A, DMA25
封裝: MODULE-25
文件頁數(shù): 3/4頁
文件大?。?/td> 315K
代理商: PM75B4L1C060
PM75B4L1C060
Photo Voltaic IPM
H-Bridge
75 Amperes/600 Volts
Powerex, Inc., 173 Pavilion Lane,Youngwood, Pennsylvania 15697 (724) 925-7272 www.pwrx.com
3
03/11 Rev. 0
Electrical and Mechanical Characteristics,
Tj = 25°C unless otherwise specified
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Inverter Part
Collector-Emitter Saturation Voltage
VCE(sat)
VD = 15V, IC = 75A, VCIN = 0V,
2.2
2.7
Volts
Pulsed, Tj = 25°C
VD = 15V, IC = 75A, VCIN = 0V,
2.2
2.7
Volts
Pulsed, Tj = 125°C
Emitter-Collector Voltage
VEC
IE = 75A, VD = 15V, VCIN = 15V
2.4
3.3
Volts
Switching Times
ton
0.1
0.5
1.2
s
trr
VD = 15V, VCIN = 0 15V
0.1
0.2
s
tC(on)
VCC = 300V, IC = 75A,
0.15
0.3
s
toff
Tj = 125°C, Inductive Load
1.1
2.0
s
tC(off)
0.2
0.4
s
Collector-Emitter Cutoff Current
ICES
VCE = VCES, VD = 15V, VCIN = 15V, Tj = 25°C —
1.0
mA
VCE = VCES, VD = 15V,
10
mA
VCIN = 15V, Tj = 125°C
Control Part
Circuit Current
ID
VD = 15V, VCIN = 15V, VN1-VNC
6.5
12
mA
VD = 15V, VCIN = 15V, V*P1-V*PC
1.6
4
mA
Input ON Threshold Voltage
Vth(on)
Applied between UP-VUPC,
1.2
1.5
1.8
Volts
Input OFF Threshold Voltage
Vth(off)
VP-VVPC, UN- VN- WN-Br-VNC
1.7
2.0
2.3
Volts
Short Circuit Trip Level
SC
-20°C ≤ Tj ≤ 125°C, VD = 15V
112
Amperes
Short Circuit Current Delay Time
toff(SC)
VD = 15V
0.2
s
Over Temperature Protection
OT
Trip Level
135
°C
(Detect Temperature of IGBT)
OT(hys)
Hysteresis
20
°C
Supply Circuit Under-voltage Protection
UVt
Trip Level
11.5
12.0
12.5
Volts
(-20°C ≤ Tj ≤ 125°C)
UVr
Reset Level
12.5
Volts
Fault Output Current
IFO(H)
VD = 15V, VFO = 15V
0.01
mA
IFO(L)
VD = 15V, VFO = 15V
10
15
mA
Fault Output Pulse Width*2
tFO
VD = 15V
1.0
1.8
ms
*2 Fault output is given only when the internal SC, OT and UV protections schemes of either upper or lower devide operate to protect it.
Fault output of SC protection given pulse. Fault output of OT, UV protection given pulse while over trip level.
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