參數(shù)資料
型號(hào)： PM6541
廠商： PMC-Sierra, Inc.
英文描述： E1XC EVALUATION DAUGHTERBOARD
中文描述： E1XC評(píng)價(jià)子板
文件頁(yè)數(shù)： 26/49頁(yè)
文件大?。?/td> 179K
代理商： PM6541
PMC-Sierra, Inc.
PM6541 E1XC-EVBD
TELECOM STANDARD PRODUCT
PMC-930917
ISSUE 1
E1XC EVALUATION DAUGHTERBOARD
23
BTPCM
BTSIG
BTFP
BTCLK
BRFPI
BRCLK
BRPCM
BRSIG
BRFPO
RCLKO
RFP
TAP
TAN
E-1
Transmit
Interface
RAS
REF
E-1
Receive
Interface
"N
E
T
W
O
R
K"
E
BRFPI
BRCLK
BRPCM
BRSIG
BRFPO
RCLKO
RFP
BTPCM
BTSIG
BTFP
BTCLK
E
GFP
BEXTFP
J20
C1M5
C2M
BEXTCLK
J24
J21
GFP
BEXTFP
J19
J22
C1M5
C2M
BEXTCLK
J23
E-1
Transmit
Interface
E-1
Receive
Interface
REF
RAS
TAN
TAP
C
U
S
T
O
M
E
R
E
W
J30
RFP
Figure 5: CSU Circuit Overview
Both E1XCs are connected in a symmetrical fashion and most connections are
completed by installing shorting bar jumpers into the two 16 pin DIP sockets labeled
for the CSU set-up. The remaining unconnected signals are BRCLK, BRFPI, and
BTCLK. By installing jumpers across pins 1 and 2 of each of jumper blocks J19 and
J20, between pins 3 and 4 of each of the jumper blocks J21, J22, J23, J24, and
between pin 2 and 3 of jumper block J30, a "CSU" like application can be
implemented where the 2.048 MHz clock for the backplane between the two E1XC
devices is provided by the MT8940, which in turn is locked to the recovered clock
provided by E1XC #1. Bits 1 and 2 of SW1 must be closed; the remaining bits
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