
PMC-920524 (R8)
1997 PMC-Sierra, Inc.. March, 1997
S/UNI-155 SATURN USER NETWORK INTERFACE
PM5345
Summary Information
FEATURES
Network LAN Interface.
convergence (TC) sublayer for
I.432 and ATM Forum document
Operates at 19.44 Mbytes/s,
into a SONET STS-3c or SDH STM-1
Provides on-chip parallel-to-serial
Monolithic SATURN SONET/SDH
Implements the ATM transmission
T1.646, ITU-T Recommendation
Specification", Version 3.1.
processing a duplex 8-bit or 16-bit
compatible bit serial stream operating
and serial-to-parallel conversion
Asynchronous Transfer Mode User
Broadband ISDN according to ANSI
"ATM User-Network Interface
data stream and mapping ATM cells
at 155 Mbit/s.
circuits and pseudo-ECL interfaces
Provides 4 cell deep FIFO buffers in
external FIFO expansion.
all overhead to allow external
microprocessor bus interface for
Provides a standard 5-signal
operating at the155 Mbit/s line rate.
both transmit and receive paths and
Expansion ports provides access to
compliance.
Provides a generic 8-bit
monitoring.
P1149.1 JTAG test port for boundary
provides interface circuitry for
processing for full SONET/SDH
configuration, control and status
scan board test purposes.
Provides TTL compatible inputs and
Low power, +5 Volt CMOS
160 pin plastic quad flat pack (PQFP)
outputs and a pseudo-ECL
technology.
package.
compatible serial line side interface.
APPLICATIONS
ATM public network switching system
B-ISDN User-Network Interfaces
Gigabit network interfaces
ATM LAN interfaces for computers,
interfaces
B-ISDN test equipment interfaces
workstations, switches and PCs
Tx ATM
4 Cell
FIFO
Rx ATM
4 Cell
FIFO
Drop
Side/
I/F
Line
Side
I/F
POUT[7:0]
POCLK
PIN[7:0]
PICLK
FPIN
FPOS
OOF
T
Tx
Path
O/H
Processor
Rx
Path
O/H
Processor
TDAT[15:0]
TCA
TWRB
TSOC
RDAT[15:0]
RCA
RRDB
R
RSOC
D
A
A
C
R
W
R
I
Microprocessor
I/F
Transport
Overhead
Extract
Transport
Overhead
Insert
T
R
T
R
R
T
L
L
T
R
R
T
T
Tx
Section
O/H
Processor
Tx
Line O/H
Processor
Rx
Section
O/H
Processor
Rx
Line O/H
Processor
T
T
R
T
L
F
T
T
L
P
P
T
FPOUT
Tx ATM
Cell
Processor
Rx ATM
Cell
Processor
T
T
T
T
T
T
JTAG Test
Access Port
TXD+/-
Par/
Ser
TXCI+/-
TXCO+/-
RXD+/-
Ser/
Par
RXC+/-
B
T
R
G
T
Path
Overhead
Insert
Path
Overhead
Extract
V
V
System Side
Line Side
BLOCK DIAGRAM