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參數(shù)資料
| 型號(hào)： | PM50CSE120 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FLAT-BASE TYPE INSULATED PACKAGE |
| 中文描述： | 平性基地型絕緣包裝 |
| 文件頁(yè)數(shù)： | 6/6頁(yè) |
| 文件大?。?/td> | 127K |
| 代理商： | PM50CSE120 |
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CSE120
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
NOTES FOR STABLE AND SAFE OPERATION ;
Design the PCB pattern to minimize wiring length between opto-coupler and IPM
’
s input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
Quick opto-couplers: TPLH, TPLH
≤
0.8
μ
s. Use High CMR type. The line between opto-coupler and intelligent module
should be shortened as much as possible to minimize the floating capacitance.
Slow switching opto-coupler: recommend to use at CTR = 100 ~ 200%, Input current = 8 ~ 10mA, to work in active.
Use 4 isolated control power supplies (V
D
). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
OUT
Si
GND
GND
In
Vcc
U
V
W
NC
N
P
M
I
F
+
–
OUT
Si
GND
GND
In
Vcc
OUT
Si
GND
GND
In
Vcc
OUT
Si
GND
GND
In
Fo
Vcc
OUT
Si
GND
GND
In
Fo
TEMP
Vcc
OUT
Si
GND
GND
In
Fo
Vcc
V
WP1
W
P
V
WPC
Th
U
N
V
N
V
N1
W
N
V
NC
Rfo
Fo
V
VP1
V
P
V
VPC
≥
0.1
μ
1k
≥
0.1
μ
≥
0.1
μ
20k
20k
20k
≥
10
μ
≥
10
μ
≥
10
μ
20k
≥
10
μ
≥
0.1
μ
V
UP1
U
P
V
UPC
NC
I
F
I
F
I
F
5V
V
D
V
D
V
D
V
D
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
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