參數(shù)資料
型號： PM4344
廠商： PMC-Sierra, Inc.
元件分類： 通信及網(wǎng)絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 1/2頁
文件大?。?/td> 80K
代理商： PM4344
PMC-941030 (R7)
1998 PMC-Sierra, Inc. October, 1998
PM4344
TQUAD
PMC-Sierra,Inc.
Quad T1 Framer
FEATURES
Monolithic single-chip device that
integrates four full-featured T1 framers
and transmitters for terminating duplex
DS1 signals.
Supports SF, ESF, T1DM (DDS), and
SLC96 format DS1 signals.
Supports unframed mode. Supports
B8ZS or AMI line codes.
Supports transfer of PCM and
signalling data to/from 1.544 Mbit/s,
2.048 Mbit/s, 12.352 Mbit/s, or
16.384 Mbit/s backplane buses.
Supports
n
x DS0 backplane interface
for fractional T1.
Provides robbed-bit signalling
extraction/insertion, programmable idle
and digital milliwatt code substitution,
and two superframes of signalling
debounce on a per-channel basis.
Provides trunk conditioning which
forces programmable trouble code
substitution and signalling conditioning
on all/selected channels.
Provides ESF bit-oriented code
detection/generation, and an HDLC
interface for terminating/generating the
ESF data link.
Software and functionally compatible
with the PM4341A T1XC Single T1
Transceiver. Pin-compatible with the
PM6344 EQUAD Quad E1 Framer.
Provides an 8-bit microprocessor bus
interface for configuration, control, and
status monitoring.
Low power 5 V CMOS technology.
Available in a rectangular 128-pin
PQFP (14 by 20 mm) package.
RECEIVE SECTION
Recovers clock and data using a digital
PLL for high jitter tolerance.
Accepts/provides dual- or single-rail
digital PCM inputs/outputs. Accepts
gapped data streams to support higher
rate demultiplexing.
Provides Loss Of Signal (LOS)
detection, and red, yellow, and Alarm
Indication Signal (AIS) alarm detection.
Detects violations of the ANSI T1.403
12.5% pulse density rule over a
moving 192-bit window.
Provides programmable in-band
loopback code detection.
Supports line and path performance
monitoring according to AT&T and
ANSI specifications. Accumulators are
provided for counting, ESF CRC-6
errors, Framing bit errors, Line Code
Violations (LCVs), and Loss Of Frame
(LOF) or change of frame alignment
events.
Extracts the data link in ESF, T1DM
(DDS), or SLC96 modes. Extracts
selected channels.
Provides a 2-frame elastic store buffer
for jitter and wander attenuation.
TRANSMIT SECTION
Optionally accepts/provides dual-rail
digital PCM inputs/outputs.
Provides per-channel minimum ones
density through Bell (bit 7), GTE, DDS,
or “jammed bit 8" (56 Kbit/s) zero code
suppression.
Detects violations of the ANSI T1.403
12.5% pulse density rule over a
moving 192-bit window.
Allows insertion of framed or un-
framed in-band loopback code
sequences.
Allows insertion of a data link in ESF,
T1DM (DDS) or SLC
96 modes.
Allows insertion of selected channels
through a serial port.
Supports transmission of the AIS or
the yellow alarm signal in all formats.
Provides a digital PLL for generation of
a low jitter transmit clock.
Provides a FIFO buffer for jitter
attenuation and transmit rate
conversion. FIFO full or empty
indication allows for bit-stuffing in
higher rate multiplexing applications.
APPLICATIONS
T1/T3 Multiplexers and Digital Private
Branch Exchanges (PBXs)
T1 Frame Relay Interfaces
T1 ATM Interfaces
Fractional T1 Interfaces
Digital Access and Cross-Connect
Systems (DACS) and Electronic DSX
Cross-Connect Systems (EDSXs)
Digital Loop Carriers (DLCs)
T1 Channel Service Units (CSUs) and
Data Service Units (DSUs)
ISDN Primary Rate Interfaces (PRIs)
SONET Add/Drop Multiplexers (ADMs)
BLOCK DIAGRAM
BTCLK[1:4]/
MTCLK*
RDLSIG/
RDLINT[1:4]
RDLCLK/
RDLEOM[1:4]
TCLK1[1:4]
BTPCM/
BTDP[1:4]/MTD*
BTSIG/BTDN[1:4]
BTFP[1:4]/MTFP*
Receiver
Transmitter
TDLSIG/TDLINT[1:4]
TDLCLK/TDLUDR[1:4]
RDN/RLCV[1:4]
RCLK[1:4]
Alarm Insertion,
TruLine Coding
Controller:
Signal, Idle,
BRCLK*/MRCLK*
BRFPI*/MRFPI*
RDP/RDD[1:4]
TDP/TDD[1:4]
TCLKO[1:4]
TDN/TFLG[1:4]
BRSIG/BRDN[1:4]
BRPCM/BRDP[1:4]
RFP[1:4]
RCLKO[1:4]
MRD*
Interface
A[9:0]*
RDB*
WRB*
CSB*
ALE*
INTB*
RSTB*
D[7:0]*
* These signals are shared between all four framers.
InBus
BitCode
Generator
Pulse
Density
TrXFDL
LICode
Generator
TrDTIF
Attenuator
TOPS
RDRIF
TBTIF
ICode
Detector
Pulse
Density
CData
Recovery
Frame
AlAlarm
Extraction
InALMI
PeMonitor
Counters
BitCode
Detector
RFDL
CConditioning
FrFRAM
Extractor
Store
Receive
Interface
BRFPO[1:4]
XCLK/VCLK*
MENB*
相關PDF資料
PDF描述
PM4351 KPSE06E18-32PDN
PM4351-NI COMBINED E1/T1 TRANSCEIVER
PM4351-RI COMBINED E1/T1 TRANSCEIVER
PM4354-PI Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
PM4354 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關代理商/技術參數(shù)
參數(shù)描述
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PM43-470K-RC 功能描述:固定電感器 47uH 10% RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm
PM43-4R7M 功能描述:固定電感器 4.7uH 4X4.5X3.2mm RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm
PM43-4R7M-RC 功能描述:固定電感器 4.7uH 20% RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm
PM4351 制造商:PMC 制造商全稱:PMC 功能描述:Combined E1/T1/J1 Transceiver/Framer
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