參數(shù)資料
型號: PLHS501A
廠商: NXP SEMICONDUCTORS
元件分類: PLD
英文描述: Programmable macro logic PML
中文描述: OT PLD, PQCC52
封裝: PLASTIC, LCC-52
文件頁數(shù): 11/12頁
文件大?。?/td> 84K
代理商: PLHS501A
Philips Semiconductors Programmable Logic Devices
Product specification
PLHS501/PLHS501
I
Programmable macro logic
PML
October 22, 1993
11
PLHS501 GATE AND SPEED ESTIMATE TABLE
FUNCTION
INTERNAL NAND
EQUVALENT
TYPICAL t
PD
f
MAX
COMMENTS
Gates
NANDs
ANDs
NORs
ORs
1
1
1
1
6.5ns
6.5ns
6.5ns
6.5ns
For 1 to 32 input variables
For 1 to 32 input variables
For 1 to 32 input variables
For 1 to 32 input variables
Decoders
3-to-8
4-to-16
5-to-32
8
16
32
11ns
11ns
11ns
Inverted inputs available
Inverted inputs available
Inverted inputs available (24 chip outputs only)
Encoders
8-to-3
16-to-4
32-to-5
15
32
41
11ns
11ns
11ns
Inverted inputs, 2 logic levels
Inverted inputs, 2 logic levels
Inverted inputs, 2 logic levels, factored solution.
Multiplexers
4-to-1
8-to-1
16-to-1
27-to-1
5
9
17
28
11ns
11ns
11ns
11ns
Inverted inputs available
Can address only 27 external inputs - more if internal
Flip-Flops
D-type Flip-Flop
T-type Flip-Flop
J-K-type Flip-Flop
6
6
10
30MHz
30MHz
30MHz
With asynchronous S-R
With asynchronous S-R
With asynchronous S-R
Adders
8-bit
45
15.5ns
Full carry-lookahead (four levels of logic)
Barrel Shifters
8-bit
72
11ns
2 levels of logic
Latches
D-latch
3
2 levels of logic with one shared gate
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