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參數(shù)資料
| 型號： | PJ34063CD |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.5 A SWITCHING REGULATOR, 100 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封裝： | DIP-8 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 351K |
| 代理商： | PJ34063CD |
PJ34063
DC-To-DC Converter Controller
7-8
2004/10 rev.B
Table : Design Formula
Calculation
Step-Up
Step-Down
Voltage-Inverting
toff
ton
Vsat
(min)
V
(min)
V
cc
in
F
out
+
OUT
cc
F
OUT
V
Vsat
V
+
Vsat
V
cc
F
OUT
+
(ton+toff) max
min
1
f
min
1
f
min
1
f
CT
4.0×10-5 ton
Ipk(switch)
2Iout(max)
+1
toff
ton
2Iout(max)
+1
toff
ton
Rsc
0.3/IPK(switch)
L (min)
(max)
)
(
(min)
ton
switch
Ipk
Vsat
Vin
(max)
)
(
(min)
ton
switch
Ipk
Vout
Vsat
Vin
(max)
)
(
(min)
ton
switch
Ipk
Vsat
Vin
Co
)
( pp
Vripple
Ioutton
+
)
(
8
)
)(
(
pp
Vripple
toff
ton
switch
Ipk
)
( pp
Vripple
Ioutton
TERMS AND DEFINITIONS
Vsat = Saturation Voltage of the output switch.
VF = Forward Voltage drop of the rectifier.
The following power supply characteristics must be chosen:
Vin= Normal input voltage
Vout: Desied Output voltage, |Vout|=1.25
+
1
2
1
R
Iout : Desired output current.
fmin : Minimum desired output switching frequency at the selected values for Vin and.Io.
Vripple(p-p): Desired peak-to-peak output ripple voltage. in practice, the calculated capaitor value will need to be increased
due to its equivalent series resistance and board layout.
The ripple voltage should be kept to a low value since it will directly affect the line and load regulation.
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