
2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 117
PIC32MX1XX/2XX
REGISTER 9-14:
DCHxSPTR: DMA CHANNEL x SOURCE POINTER REGISTER(1)
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0
—
23:16
U-0
—
15:8
R-0
CHSPTR<15:8>
7:0
R-0
CHSPTR<7:0>
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-16 Unimplemented: Read as ‘0’
bit 15-0
CHSPTR<15:0>: Channel Source Pointer bits
1111111111111111 = Points to byte 65,535 of the source
0000000000000001 = Points to byte 1 of the source
0000000000000000 = Points to byte 0 of the source
Note 1: When in Pattern Detect mode, this register is reset on a pattern detect.
REGISTER 9-15:
DCHxDPTR: DMA CHANNEL x DESTINATION POINTER REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0
—
23:16
U-0
—
15:8
R-0
CHDPTR<15:8>
7:0
R-0
CHDPTR<7:0>
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-16 Unimplemented: Read as ‘0’
bit 15-0
CHDPTR<15:0>: Channel Destination Pointer bits
1111111111111111 = Points to byte 65,535 of the destination
0000000000000001 = Points to byte 1 of the destination
0000000000000000 = Points to byte 0 of the destination