2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 9
PIC32MX1XX/2XX
Pin Diagrams (Continued)
44-Pin QFN(1,2,3)
= Pins are up to 5V tolerant
Note
1:
2:
Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for more
information.
3:
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
4:
This pin function is available on PIC32MX130F064D and PIC32MX150F128D devices only.
RP
B8/SCL1/CTED10
/PMD4
/RB8
RPB
7
/CTE
D3
/P
M
D
5
/I
N
T0
/RB
7
PG
E
C
3/
R
P
B6
/P
M
D
6
/R
B
6
PG
E
D
3/
R
P
B5
/P
M
D
7
/R
B
5
V
DD
V
SS
RP
C5/P
MA3/RC5
RP
C4/P
MA4/RC4
RP
C3/RC3
TDI/
RPA
9
/P
M
A
9/
RA
9
S
O
SCO
/RP
A4/
T
1CK/
CTE
D
9/RA
4
44
43
42
41
40
39
38
37
36
35
34
RPB9/SDA1/CTED4/PMD3/RB9
1
33
SOSCI/RPB4/RB4
RPC6/PMA1/RC6
2
32
TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7
3
31
OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8
4
30
OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9
5
29
VSS
6
PIC32MX110F016D
28
VDD
VCAP
7
27
AN8/RPC2/PMA2/RC2
PGED2/RPB10/CTED11/PMD2/RB10
8
26
AN7/RPC1/RC1
PGEC2/RPB11/PMD1/RB11
9
25
AN6/RPC0/RC0
AN12/PMD0/RB12
10
24
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
AN11/RPB13/CTPLS/PMRD/RB13
11
23
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
12
13
14
15
16
17
18
19
20
21
22
PG
ED4
(4)
/TM
S
/P
M
A
10
/R
A1
0
PG
EC
(4)
/TCK
/C
TED
8/
P
M
A
7
/RA
7
CV
RE
F
/A
N10
/C3I
N
B/
RPB1
4/
SCK1/
C
TED5/
P
MWR/
R
B
14
A
N
9
/C
3
IN
A/
R
P
B
1
5
/S
C
K2
/C
TE
D
6/
P
M
C
S1
/R
B1
5
AV
SS
AV
DD
MCLR
V
RE
F
+/CV
REF
+/A
N
0/C3
INC/R
P
A0/CTED1/RA0
V
REF
-/
CV
REF
-/
AN1/
R
P
A1/
C
TED2/
R
A1
PGE
D
1/A
N
2/C1
IND/C2INB
/C3IND/RP
B0/RB0
PGE
C
1/AN3/C
1INC/C2IN
A
/RP
B1/CT
E
D12/RB1
PIC32MX120F032D
PIC32MX130F064D
PIC32MX150F128D