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PIC24HJ32GP202/204 AND PIC24HJ16GP304
DS70289J-page 48
2007-2011 Microchip Technology Inc.
5.2
RTSP Operation
The Flash program memory array is organized into
rows of 64 instructions or 192 bytes. RTSP allows the
user application to erase a page of memory, which con-
sists of eight rows (512 instructions) at a time, and to
program one row or one word at a time. The 8-row
erase pages and single row write rows are
edge-aligned from the beginning of program memory,
on boundaries of 1536 bytes and 192 bytes,
respectively.
The program memory implements holding buffers that
can contain 64 instructions of programming data. Prior
to the actual programming operation, the write data
must be loaded into the buffers sequentially. The
instruction words loaded must always be from a group
of 64 boundary.
The basic sequence for RTSP programming is to set up
a Table Pointer, then do a series of TBLWT instructions
to load the buffers. Programming is performed by
setting the control bits in the NVMCON register. A total
of 64 TBLWTL and TBLWTH instructions are required
to load the instructions.
All table write operations are single-word writes (two
instruction cycles) because only the buffers are written.
A programming cycle is required for programming each
row.
5.3
Programming Operations
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode.
The
processor stalls (waits)
until
the
programming operation is finished.
The programming time depends on the FRC accuracy
formula to calculate the minimum and maximum values
for the Row Write Time, Page Erase Time, and Word
EQUATION 5-1:
PROGRAMMING TIME
For example, if the device is operating at +125
°C,
the FRC accuracy will be ±5%. If the TUN<5:0> bits
‘b111111
, the
EQUATION 5-2:
MINIMUM ROW WRITE
TIME
EQUATION 5-3:
MAXIMUM ROW WRITE
TIME
Setting the WR bit (NVMCON<15>) starts the
operation, and the WR bit is automatically cleared
when the operation is finished.
5.4
Flash Memory Resources
Many useful resources are provided on the main prod-
uct page of the Microchip web site for the devices listed
in this data sheet. This product page, which can be
accessed using this
link, contains the latest updates
and additional information.
5.4.1
KEY RESOURCES
Section 5. “Flash Programming” (DS70191)
Code Samples
Application Notes
Software Libraries
Webinars
All related dsPIC33F/PIC24H Family Reference
Manuals Sections
Development Tools
5.5
Control Registers
The two SFRs that are used to read and write the
program Flash memory are:
blocks need to be erased, which memory type is to be
programmed and the start of the programming cycle.
used for write protection. To start a programming or
erase
sequence,
the
user
application
must
consecutively write 0x55 and 0xAA to the NVMKEY
register.
Refer
to
for further details.
T
7.37 MHz
FRC Accuracy
()%
FRC Tuning
()%
×
--------------------------------------------------------------------------------------------------------------------------
T
RW
11064 Cycles
7.37 MHz
10.05
+
()
1
0.00375
–
()
×
----------------------------------------------------------------------------------------------
1.435ms
=
Note:
In the event you are not able to access
the product page using the link above,
enter
this
URL
in
your
browser:
T
RW
11064 Cycles
7.37 MHz
10.05
–
()
1
0.00375
–
()
×
----------------------------------------------------------------------------------------------
1.586ms
=