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    參數(shù)資料
    型號: PIC24HJ128GP502T-I/MM
    廠商: Microchip Technology
    文件頁數(shù): 7/84頁
    文件大小: 0K
    描述: IC PIC MCU FLASH 28QFN
    標(biāo)準(zhǔn)包裝: 1,600
    系列: PIC® 24H
    核心處理器: PIC
    芯體尺寸: 16-位
    速度: 40 MIP
    連通性: CAN,I²C,IrDA,LIN,PMP,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
    輸入/輸出數(shù): 21
    程序存儲器容量: 128KB(43K x 24)
    程序存儲器類型: 閃存
    RAM 容量: 8K x 8
    電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b/12b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 28-VQFN 裸露焊盤
    包裝: 帶卷 (TR)
    其它名稱: PIC24HJ128GP502T-I/MMTR
    2010 Microchip Technology Inc.
    DS70152H-page 15
    dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
    HPOL
    FPOR
    Motor Control PWM High-Side Polarity bit
    1 = PWM module high-side output pins have active-high output polarity
    0 = PWM module high-side output pins have active-low output polarity
    LPOL
    FPOR
    Motor Control PWM Low-Side Polarity bit
    1 = PWM module low-side output pins have active-high output polarity
    0 = PWM module low-side output pins have active-low output polarity
    ALTI2C
    FPOR
    Alternate I2C pins
    1 = I2C mapped to SDA1/SCL1 pins
    0 = I2C mapped to ASDA1/SACL1 pins
    ALTQIO
    FPOR
    Enable Alternate QEI pins
    1 = QEA1A, AEB1A and INDX1A are selected as inputs to QEI1
    0 = QEA1, AEB1 and INDX1 are selected as inputs to QEI1
    ALTSS1
    FPOR
    Enable Alternate SS1 pins
    1 = SS1A is selected as I/O to SPI1
    0 = SS1 is selected as I/O to SPI1
    BOREN
    FPOR
    Brown-out Reset Enable Bit
    1 = BOR is enabled in hardware
    0 = BOR is disabled in hardware
    FPWRT<2:0>
    FPOR
    Power-on Reset Timer Value Select bits
    111 = PWRT = 128 ms
    110 = PWRT = 64 ms
    101 = PWRT = 32 ms
    100 = PWRT = 16 ms
    011 = PWRT = 8 ms
    010 = PWRT = 4 ms
    001 = PWRT = 2 ms
    000 = PWRT Disabled
    JTAGEN
    FICD
    JTAG Enable bit
    1 = JTAG enabled
    0 = JTAG disabled
    ICS<1:0>
    FICD
    ICD Communication Channel Select bits
    11 = Communicate on PGC1/EMUC1 and PGD1/EMUD1
    10 = Communicate on PGC2/EMUC2 and PGD2/EMUD2
    01 = Communicate on PGC3/EMUC3 and PGD3/EMUD3
    00 = Reserved, do not use
    CMPPOL0
    FCMP
    Comparator Hysteresis Polarity (for even numbered comparators)
    1 = Hysteresis is applied to falling edge
    0 = Hysteresis is applied to rising edge
    HYST0<1:0>
    FCMP
    Comparator Hysteresis Select
    11 = 45 mV Hysteresis
    10 = 30 mV Hysteresis
    01 = 15 mV Hysteresis
    00 = No Hysteresis
    CMPPOL1
    FCMP
    Comparator Hysteresis Polarity (for odd numbered comparators)
    1 = Hysteresis is applied to falling edge
    0 = Hysteresis is applied to rising edge
    HYST1<1:0>
    FCMP
    Comparator Hysteresis Select
    11 = 45 mV Hysteresis
    10 = 30 mV Hysteresis
    01 = 15 mV Hysteresis
    00 = No Hysteresis
    All
    Unimplemented (read as ‘0’, write as ‘0’)
    TABLE 3-2:
    dsPIC33F/PIC24H CONFIGURATION BITS DESCRIPTION (CONTINUED)
    Bit Field
    Register
    Description
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