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PIC24FJ256GA110 FAMILY
DS39905E-page 108
2010 Microchip Technology Inc.
REGISTER 7-35:
IPC20: INTERRUPT PRIORITY CONTROL REGISTER 20
U-0
R/W-1
R/W-0
U-0
R/W-1
R/W-0
—
U3TXIP2
U3TXIP1
U3TXIP0
—
U3RXIP2
U3RXIP1
U3RXIP0
bit 15
bit 8
U-0
R/W-1
R/W-0
U-0
—
U3ERIP2
U3ERIP1
U3ERIP0
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented:
Read as ‘0’
bit 14-12
U3TXIP<2:0>:
UART3 Transmitter Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 11
Unimplemented:
Read as ‘0’
bit 10-8
U3RXIP<2:0>:
UART3 Receiver Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 7
Unimplemented:
Read as ‘0’
bit 6-4
U3ERIP<2:0>:
UART3 Error Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 3-0
Unimplemented:
Read as ‘0’