參數(shù)資料
型號： PIC24FJ64GA002T-I/SS
廠商： Microchip Technology
文件頁數(shù)： 37/52頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 64K 28SSOP
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
標(biāo)準(zhǔn)包裝： 2,100
系列： PIC® 24F
核心處理器： PIC
芯體尺寸： 16-位
速度： 32MHz
連通性： I²C，PMP，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 21
程序存儲器容量： 64KB（22K x 24）
程序存儲器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SSOP（0.209"，5.30mm 寬）
包裝： 帶卷 (TR)
配用： DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28
AC164338-ND - MOD SKT PIC24F/DSPIC33F 28SOIC
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
其它名稱： PIC24FJ64GA002T-I/SSTR
PIC24FJXXXGA0XX
DS39768D-page 42
2008 Microchip Technology Inc.
5.4
Programming the Programming
Executive to Memory
5.4.1
OVERVIEW
If it is determined that the programming executive is
not present in executive memory (as described
Programming Executive”), it must be programmed
into executive memory using ICSP, as described in
Storing the programming executive to executive
memory is similar to normal programming of code
memory. Namely, the executive memory must be
erased, and then the programming executive must be
programmed 64 words at a time. Erasing the last page
of executive memory will cause the FRC oscillator
calibration settings and device diagnostic data in the
Diagnostic and Calibration Words, at addresses
8007F0h to 8007FEh, to be erased. In order to retain
this calibration, these memory locations should be read
and stored prior to erasing executive memory. They
should then be reprogrammed in the last words of pro-
gram memory. This control flow is summarized in
TABLE 5-5:
PROGRAMMING THE PROGRAMMING EXECUTIVE
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit Reset vector and erase executive memory.
0000
000000
040200
000000
NOP
GOTO
0x200
NOP
Step 2: Initialize pointers to read Diagnostic and Calibration Words for storage in W6-W13.
0000
200800
880190
207F00
2000C2
000000
MOV
#0x80, W0
MOV
W0, TBLPAG
MOV
#0x07F0, W1
MOV
#0xC, W2
NOP
Step 3: Repeat this step 8 times to read Diagnostic and Calibration Words, storing them in W registers, W6-W13.
0000
BA1931
000000
TBLRDL
[W1++].[W2++]
NOP
Step 4: Initialize the NVMCON to erase executive memory.
0000
240420
883B00
MOV
#0x4042, W0
MOV
W0, NVMCON
Step 5: Initialize Erase Pointers to first page of executive and then initiate the erase cycle.
0000
00000
0000
200800
880190
200001
000000
BB0881
000000
A8E761
000000
MOV
#0x80, W0
MOV
W0, TBLPAG
MOV
#0x0, W1
NOP
TBLWTL
W1, [W1]
NOP
BSET
NVMCON, #15
NOP
Step 6: Repeat this step to poll the WR bit (bit 15 of NVMCON) until it is cleared by the hardware.
0000
0001
0000
040200
000000
803B02
883C22
000000
<VISI>
000000
GOTO
0x200
NOP
MOV
NVMCON, W2
MOV
W2, VISI
NOP
Clock out contents of the VISI register.
NOP
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