
2011
Micr
ochip
T
e
ch
nol
ogy
I
n
c.
DS
31037B
-page
38
PIC24
F16KL
402
FAMILY
TABLE 4-6:
TIMER REGISTER MAP
File Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TMR1
0100
Timer1 Register
0000
PR1
0102
Timer1 Period Register
FFFF
T1CON
0104
TON
—TSIDL
—
T1ECS1 T1ECS0
—
TGATE
TCKPS1
TCKPS0
—
TSYNC
TCS
—
0000
TMR2
0106
—
Timer2 Register
0000
PR2
0108
—
Timer2 Period Register
00FF
T2CON
010A
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
0000
TMR3
010C
Timer3 Register
0000
T3GCON
010E
—
TMR3GE
TG3POL
T3GTM
T3GSPM
T3GGO
T3GVAL
T3GSS1
T3GSS0
0000
T3CON
0110
—
TMR3CS1 TMR3CS0
T3CKPS1
T3CKPS0
SOSCEN
T3SYNC
—TMR3ON
0000
0112
—
Timer4 Register
0000
0114
—
Timer4 Period Register
00FF
0116
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0
0000
013C
—
—
C2TSEL0
—
C1TSEL0
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
These bits and/or registers are unimplemented on PIC24FXXKL10X and PIC24FXXKL20X family devices; read as ‘0’.
TABLE 4-7:
CCP/ECCP REGISTER MAP
File Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
CCP1CON
0190
—
DC1B1
DC1B0
CCP1M3
CCP1M2 CCP1M1 CCP1M0
0000
CCPR1L
0192
—
Capture/Compare/PWM1 Register Low Byte
0000
CCPR1H
0194
—
Capture/Compare/PWM1 Register High Byte
0000
0196
—
PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0
0000
0198
—
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1
PSSAC0
PSSBD1 PSSBD0
0000
—
—CMPL1
CMPL0
—
STRSYNC
STRD
STRC
STRB
STRA
0001
CCP2CON
019C
—
DC2B1
DC2B0
CCP2M3
CCP2M2 CCP2M1 CCP2M0
0000
CCPR2L
019E
—
Capture/Compare/PWM2 Register Low Byte
0000
CCPR2H
01A0
—
Capture/Compare/PWM2 Register High Byte
0000
01A8
—
DC3B1
DC3B0
CCP3M3
CCP3M2 CCP3M1 CCP3M0
0000
01AA
—
Capture/Compare/PWM3 Register Low Byte
0000
01AC
—
Capture/Compare/PWM3 Register High Byte
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
These bits and/or registers are unimplemented on PIC24FXXKL10X and PIC24FXXKL20X family devices; read as ‘0’.