
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
DS70657E-page 186
Preliminary
2011-2012 Microchip Technology Inc.
REGISTER 11-7:
RPINR12: PERIPHERAL PIN SELECT INPUT REGISTER 12
(dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X DEVICES ONLY)
U-0
R/W-0
—FLT2R<6:0>
bit 15
bit 8
U-0
R/W-0
—FLT1R<6:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented: Read as ‘0’
bit 14-8
FLT2R<6:0>: Assign PWM Fault 2 (FLT2) to the Corresponding RPn Pin bits
1111001 = Input tied to RPI121
.
0000001 = Input tied to CMP1
0000000 = Input tied to VSS
bit 7
Unimplemented: Read as ‘0’
bit 6-0
FLT1R<6:0>: Assign PWM Fault 1 (FLT1) to the Corresponding RPn Pin bits
1111001 = Input tied to RPI121
.
0000001 = Input tied to CMP1
0000000 = Input tied to VSS