2005 Microchip Technology Inc.
DS39612B-page 205
PIC18F6525/6621/8525/8621
FIGURE 18-22:
I2C MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS)
P
9
8
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
S
A7
A6
A5
A4
A3
A2
A1
SDA
SCL
12
3
4
5
6
7
8
9
12
3
4
5
67
8
9
12
3
4
B
u
s
m
a
ster
ter
m
inate
s
tra
n
sfer
AC
K
Re
ce
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g
Da
ta
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a
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e
Re
ce
ivin
g
Da
ta
fr
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m
Sla
v
e
D0
D1
D2
D3
D4
D5
D6
D7
ACK
R/W
=
1
T
ra
n
smi
tA
ddr
ess
to
S
lave
SSPI
F
BF
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s
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W
rit
e
t
o
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),
W
ri
te
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P
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occu
rs
her
e,
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ro
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a
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er
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y
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g
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ing
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ON
2<
3>
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it
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ta
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ar
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ile
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it
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Ma
ster
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te
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cknow
ledge
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te
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ledge
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nce
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e
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e
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ar
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ledg
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ence
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D
A
=
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T
=
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RCEN
cle
a
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d
a
u
tom
a
tically
RCEN
=
1
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ar
t
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xt
r
e
ce
ive
W
ri
te
to
S
P
C
ON
2<
4>
to
st
ar
tA
cknow
ledge
seque
nce
SD
A
=
ACK
D
T
(
SSP
CO
N2
<5
>)
=
0
RCEN
cle
a
re
d
a
u
tom
a
tically
re
spon
ds
to
S
P
IF
ACKEN
be
gi
n
S
tart
C
ondi
ti
on
C
lear
ed
i
n
so
ftw
are
SDA
=
A
C
KDT
=
0
S
P
O
V
i
s
set
beca
u
se
S
SPB
UF
is
still
fu
ll
La
st
bit
is
shifte
d
into
S
P
S
R
an
d
con
tent
s
ar
e
unl
oa
ded
i
n
to
S
P
B
U
F