
64
XMEGA A [MANUAL]
8077I–AVR–11/2012
5.14.12 DESTADDR1 – Channel Destination Address register 1
Bit 7:0 – DESTADDR[15:8]: Channel Destination Address byte 1
These bits hold byte 1 of the 24-bit source address.
5.14.13 DESTADDR2 – Channel Destination Address register 2
Bit 7:0 – DESTADDR[23:16]: Channel Destination Address byte 2
These bits hold byte 2 of the 24-bit source address.
Bit
7
654321
0
+0x0D
DESTADDR[15:8]
Read/Write
R/W
Initial Value
0
000000
0
Bit
76543210
+0x0E
DESTADDR[23:16]
Read/Write
R/W
Initial Value
00000000