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參數(shù)資料
| 型號： | PIC18LF27J53-I/ML |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 57/71頁 |
| 文件大小： | 0K |
| 描述： | IC PIC MCU 128KB FLASH 28QFN |
| 產(chǎn)品培訓(xùn)模塊： | 8-bit PIC® Microcontroller Portfolio |
| 標(biāo)準(zhǔn)包裝： | 61 |
| 系列： | PIC® XLP™ 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 48MHz |
| 連通性： | I²C，LIN，SPI，UART/USART，USB |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 22 |
| 程序存儲器容量： | 128KB（64K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 3.8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 2.75 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x10b/12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-VQFN 裸露焊盤 |
| 包裝： | 管件 |
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PIC18(L)F2X/4XK22
DS41412F-page 60
2010-2012 Microchip Technology Inc.
4.2
Register Definitions: Reset Control
REGISTER 4-1:
RCON: RESET CONTROL REGISTER
R/W-0/0
R/W-q/u
U-0
R/W-1/q
R-1/q
R/W-q/u
R/W-0/q
IPEN
SBOREN(1)
—RI
TO
PD
POR(2)
BOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
-n/n = Value at POR and BOR/Value at all other Resets
x = Bit is unknown
u = unchanged
q = depends on condition
bit 7
IPEN: Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6
SBOREN: BOR Software Enable bit(1)
If BOREN<1:0> = 01:
1
= BOR is enabled
0
= BOR is disabled
If BOREN<1:0> = 00, 10 or 11:
Bit is disabled and read as ‘0’.
bit 5
Unimplemented: Read as ‘0’
bit 4
RI: RESET Instruction Flag bit
1
= The RESET instruction was not executed (set by firmware or Power-on Reset)
0
= The RESET instruction was executed causing a device Reset (must be set in firmware after a
code-executed Reset occurs)
bit 3
TO: Watchdog Time-out Flag bit
1
= Set by power-up, CLRWDT instruction or SLEEP instruction
0
= A WDT time-out occurred
bit 2
PD: Power-down Detection Flag bit
1
= Set by power-up or by the CLRWDT instruction
0
= Set by execution of the SLEEP instruction
bit 1
POR: Power-on Reset Status bit(2)
1
= No Power-on Reset occurred
0
= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOR: Brown-out Reset Status bit(3)
1
= A Brown-out Reset has not occurred (set by firmware only)
0
= A Brown-out Reset occurred (must be set by firmware after a POR or Brown-out Reset occurs)
Note 1:
When CONFIG2L[2:1] = 01, then the SBOREN Reset state is ‘1’; otherwise, it is ‘0’.
2:
The actual Reset value of POR is determined by the type of device Reset. See the notes following this
register and Section 4.7 “Reset State of Registers” for additional information.
3:
See Table 4-1.
Note 1: Brown-out Reset is indicated when BOR is ‘0’ and POR is ‘1’ (assuming that both POR and BOR were set
to ‘1’ by firmware immediately after POR).
2: It is recommended that the POR bit be set after a Power-on Reset has been detected so that subsequent
Power-on Resets may be detected.
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