
PIC18FXX8
DS41159B-page 264
Preliminary
2002 Microchip Technology Inc.
REGISTER 24-5:
CONFIGURATION REGISTER 5 LOW (CONFIG5L: BYTE ADDRESS 300008h)
REGISTER 24-6:
CONFIGURATION REGISTER 5 HIGH (CONFIG5H: BYTE ADDRESS 300009h)
U-0
—
U-0
—
U-0
—
U-0
—
R/C-1
CP3
(1)
R/C-1
CP2
(1)
R/C-1
CP1
R/C-1
CP0
bit 7
bit 0
bit 7-4
bit 3
Unimplemented:
Read as ‘0’
CP3:
Code Protection bit
(1)
1
= Block 3 (006000-007FFFh) not code protected
0
= Block 3 (006000-007FFFh) code protected
CP2:
Code Protection bit
(1)
1
= Block 2 (004000-005FFFh) not code protected
0
= Block 2 (004000-005FFFh) code protected
CP1:
Code Protection bit
1
= Block 1 (002000-003FFFh) not code protected
0
= Block 1 (002000-003FFFh) code protected
CP0:
Code Protection bit
1
= Block 0 (000200-001FFFh) not code protected
0
= Block 0 (000200-001FFFh) code protected
bit 2
bit 1
bit 0
Note 1:
Unimplemented in PIC18FX48 devices; maintain this bit set.
Legend:
R = Readable bit
- n = Value when device is unprogrammed
C = Clearable bit
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
R/C-1
CPD
bit 7
R/C-1
CPB
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
bit 0
bit 7
CPD:
Data EEPROM Code Protection bit
1
= Data EEPROM not code protected
0
= Data EEPROM code protected
CPB:
Boot Block Code Protection bit
1
= Boot Block (000000-0001FFh) not code protected
0
= Boot Block (000000-0001FFh) code protected
Unimplemented:
Read as ‘0’
bit 6
bit 5-0
Legend:
R = Readable bit
- n = Value when device is unprogrammed
C = Clearable bit
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state