
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
69
M9999-100207-1.5
Bit
Default
R/W
Description
Is the same as:
9
0
RW
Restart AN
1 = Restart auto-negotiation
0 = Normal operation
P2CR4, bit 13
8
0
RW
Force full duplex
1 = Full duplex if AN is disabled (bit 12)
0 = Half duplex if AN is disabled (bit 12)
P2CR4, bit 5
7
0
RO
Collision test
Not supported
6
0
RO
Reserved
5
0
R/W
HP_mdix
1 = HP Auto MDIX mode
0 = Micrel Auto MDIX mode
P2SR, bit 15
4
0
RW
Force MDIX
1 = Force MDIX
0 = Normal operation
P2CR4, bit 9
3
0
RW
Disable MDIX
1 = Disable auto MDIX
0 = Normal operation
P2CR4, bit 10
2
0
RW
Disable far end fault
1 = Disable far end fault detection
0 = Normal operation
P2CR4, bit 12
1
0
RW
Disable transmit
1 = Disable transmit
0 = Normal operation
P2CR4, bit 14
0
RW
Disable LED
1 = Disable LED
0 = Normal operation
P2CR4, bit 15
PHY 2 MII Basic Status Register (Offset 0x04E2): P2MBSR
This register contains the MII control for the switch port 2 function.
Bit
Default
R/W
Description
Is the same as:
15
0
RO
T4 capable
1 = 100 BaseT4 capable
0 = Not 100 BaseT4 capable
14
1
RO
100 Full capable
1 = 100BaseTX full duplex capable
0 = Not capable of 100BaseTX full duplex
Always 1
13
1
RO
100 Half capable
1 = 100BaseTX half duplex capable
0 = Not 100BaseTX half duplex capable
Always 1
12
1
RO
10 Full capable
1 = 10BaseT full duplex capable
0 = Not 10BaseT full duplex capable
Always 1
11
1
RO
10 Half capable
1 = 10BaseT half duplex capable
0 = Not 10BaseT half duplex capable
Always 1