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PIC18F87J11 FAMILY
DS39778B-page 434
Preliminary
2007 Microchip Technology Inc.
Brown-out Reset (BOR)......................................................51
and On-Chip Voltage Regulator................................324
Detecting.....................................................................51
Disabling in Sleep Mode .............................................51
BSF...................................................................................341
BTFSC ..............................................................................342
BTFSS...............................................................................342
BTG...................................................................................343
BZ......................................................................................344
C
C Compilers
MPLAB C18 ..............................................................380
MPLAB C30 ..............................................................380
Calibration (A/D Converter)...............................................299
CALL .................................................................................344
CALLW..............................................................................373
Capture (CCP Module)......................................................201
Associated Registers ................................................203
CCP Pin Configuration..............................................201
CCPRxH:CCPRxL Registers ....................................201
Prescaler...................................................................201
Software Interrupt .....................................................201
Timer1/Timer3 Mode Selection.................................201
Capture (ECCP Module)...................................................210
Capture/Compare/PWM (CCP).........................................199
Capture Mode. See Capture.
CCP Mode and Timer Resources.............................200
CCPRxH Register.....................................................200
CCPRxL Register......................................................200
Compare Mode. See Compare.
Module Configuration................................................200
Timer Interconnect Configurations............................200
Clock Sources.....................................................................33
Default System Clock on Reset ..................................34
Selection Using OSCCON Register............................34
CLRF.................................................................................345
CLRWDT...........................................................................345
Code Examples
16 x 16 Signed Multiply Routine ...............................110
16 x 16 Unsigned Multiply Routine ...........................110
8 x 8 Signed Multiply Routine ...................................109
8 x 8 Unsigned Multiply Routine ...............................109
A/D Calibration Routine ............................................299
Changing Between Capture Prescalers....................201
Computed GOTO Using an Offset Value....................67
Erasing a Flash Program Memory Row......................92
Fast Register Stack.....................................................67
How to Clear RAM (Bank 1) Using
Indirect Addressing .............................................81
Implementing a Real-Time Clock Using
a Timer1 Interrupt Service ................................189
Initializing PORTA.....................................................130
Initializing PORTB.....................................................133
Initializing PORTC.....................................................136
Initializing PORTD.....................................................139
Initializing PORTE.....................................................142
Initializing PORTF.....................................................145
Initializing PORTG ....................................................148
Initializing PORTH.....................................................151
Initializing PORTJ .....................................................154
Loading the SSP1BUF (SSP1SR) Register..............226
Reading a Flash Program Memory Word ...................91
Saving STATUS, WREG and BSR
Registers in RAM..............................................126
Single-Word Write to Flash
Program Memory................................................ 95
Writing to Flash Program Memory.............................. 94
Code Protection................................................................ 313
COMF ............................................................................... 346
Comparator....................................................................... 301
Analog Input Connection Considerations ................. 304
Associated Registers................................................ 308
Configuration ............................................................ 305
Control...................................................................... 305
Effects of a Reset ..................................................... 308
Enable, Input Selection............................................. 305
Enable, Output Selection.......................................... 305
Interrupts .................................................................. 307
Operation.................................................................. 304
Operation During Sleep............................................ 308
Reference
Response Time ................................................ 304
Single Comparator.................................................... 304
Comparator Specifications................................................ 397
Comparator Voltage Reference........................................ 309
Accuracy and Error................................................... 311
Associated Registers................................................ 311
Configuring ............................................................... 310
Connection Considerations....................................... 311
Effects of a Reset ..................................................... 311
Operation During Sleep............................................ 311
Compare (CCP Module) ................................................... 202
Associated Registers................................................ 203
CCPRx Register ....................................................... 202
Pin Configuration...................................................... 202
Software Interrupt..................................................... 202
Timer1/Timer3 Mode Selection................................. 202
Compare (ECCP Module)................................................. 210
Special Event Trigger ....................................... 210, 298
Compare (ECCPx Modules)
Special Event Trigger ............................................... 195
Computed GOTO................................................................ 67
Configuration Bits ............................................................. 313
Configuration Mismatch Reset (CM)................................... 51
Configuration Register Protection..................................... 327
Core Features
Easy Migration.............................................................. 8
Expanded Memory........................................................ 7
Extended Instruction Set .............................................. 7
External Memory Bus ................................................... 7
nanoWatt Technology................................................... 7
Oscillator Options and Features................................... 7
CPFSEQ........................................................................... 346
CPFSGT ........................................................................... 347
CPFSLT............................................................................ 347
Crystal Oscillator/Ceramic Resonator................................. 35
Customer Change Notification Service............................. 431
Customer Notification Service .......................................... 431
Customer Support............................................................. 431
D
Data Addressing Modes ..................................................... 81
Comparing Addressing Modes with the
Extended Instruction Set Enabled ...................... 85
Direct .......................................................................... 81
Indexed Literal Offset ................................................. 84
BSR .................................................................... 86
Instructions Affected........................................... 84
Mapping Access Bank........................................ 86