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2007 Microchip Technology Inc.
Preliminary
DS39778B-page 435
PIC18F87J11 FAMILY
Indirect........................................................................81
Inherent and Literal.....................................................81
Data Memory ......................................................................70
Access Bank...............................................................72
Bank Select Register (BSR)........................................70
Extended Instruction Set.............................................84
General Purpose Registers.........................................72
Memory Map...............................................................71
Memory Maps
Special Function Registers.................................73
Special Function Registers.........................................73
Context Defined SFRs........................................74
Shared Address..................................................74
DAW..................................................................................348
DC and AC Characteristics
Graphs and Tables ...................................................423
DC Characteristics............................................................394
Power-Down and Supply Current .............................386
Supply Voltage..........................................................385
DCFSNZ ...........................................................................349
DECF ................................................................................348
DECFSZ............................................................................349
Default System Clock..........................................................34
Development Support .......................................................379
Device Differences............................................................429
Device Overview...................................................................7
Details on Individual Family Members..........................8
Features (64-Pin Devices)............................................9
Features (80-Pin Devices)............................................9
Direct Addressing................................................................82
E
ECCP
Associated Registers................................................222
Capture and Compare Modes...................................210
Enhanced PWM Mode..............................................211
Standard PWM Mode................................................210
Effect on Standard PIC Instructions..................................376
Effects of Power-Managed Modes on
Various Clock Sources................................................40
Electrical Characteristics...................................................383
Enhanced Capture/Compare/PWM (ECCP).....................207
Capture Mode. See Capture (ECCP Module).
ECCP1/ECCP3 Outputs and
Program Memory Mode....................................208
ECCP2 Outputs and Program Memory Modes.........208
Outputs and Configuration........................................208
Pin Configurations for ECCP1 ..................................209
Pin Configurations for ECCP2 ..................................209
Pin Configurations for ECCP3 ..................................210
PWM Mode. See PWM (ECCP Module).
Timer Resources.......................................................208
Use of CCP4/CCP5 with ECCP1/ECCP3.................208
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART). See EUSART.
ENVREG pin.....................................................................323
Equations
A/D Acquisition Time.................................................296
A/D Minimum Charging Time....................................296
Calculating the Minimum Required
Acquisition Time ...............................................296
Errata ....................................................................................5
EUSART
Asynchronous Mode................................................. 279
12-Bit Break Transmit and Receive.................. 284
Associated Registers, Receive......................... 282
Associated Registers, Transmit........................ 280
Auto-Wake-up on Sync Break.......................... 282
Receiver ........................................................... 281
Setting Up 9-Bit Mode with
Address Detect......................................... 281
Transmitter ....................................................... 279
Baud Rate Generator
Operation in Power-Managed Mode................. 273
Baud Rate Generator (BRG) .................................... 273
Associated Registers........................................ 274
Auto-Baud Rate Detect..................................... 277
Baud Rate Error, Calculating............................ 274
Baud Rates, Asynchronous Modes.................. 275
High Baud Rate Select (BRGH Bit).................. 273
Sampling .......................................................... 273
Synchronous Master Mode....................................... 285
Associated Registers, Receive......................... 287
Associated Registers, Transmit........................ 286
Reception ......................................................... 287
Transmission.................................................... 285
Synchronous Slave Mode......................................... 288
Associated Registers, Receive......................... 289
Associated Registers, Transmit........................ 288
Reception ......................................................... 289
Transmission.................................................... 288
Extended Instruction Set
ADDFSR................................................................... 372
ADDULNK ................................................................ 372
CALLW..................................................................... 373
MOVSF..................................................................... 373
MOVSS..................................................................... 374
PUSHL...................................................................... 374
SUBFSR................................................................... 375
SUBULNK................................................................. 375
External Memory Bus ......................................................... 97
16-Bit Byte Select Mode........................................... 103
16-Bit Byte Write Mode............................................. 101
16-Bit Data Width Modes.......................................... 100
16-Bit Mode Timing .................................................. 104
16-Bit Word Write Mode ........................................... 102
8-Bit Data Width Mode ............................................. 105
8-Bit Mode Timing .................................................... 106
Address and Data Line Usage (table) ........................ 99
Address and Data Width............................................. 99
Address Shifting ......................................................... 99
Control........................................................................ 98
I/O Port Functions....................................................... 97
Operation in Power-Managed Modes....................... 107
Program Memory Modes.......................................... 100
Extended Microcontroller.................................. 100
Microcontroller.................................................. 100
Wait States ............................................................... 100
Weak Pull-ups on Port Pins...................................... 100
External Oscillator Modes
Clock Input (EC Modes) ............................................. 36
HS............................................................................... 35