TABLE 31-27: MSSPx I2
參數(shù)資料
型號: PIC18F85K90-I/PTRSL
廠商: Microchip Technology
文件頁數(shù): 103/110頁
文件大?。?/td> 0K
描述: MCU PIC 32K FLASH XLP 80TQFP
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 119
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 64MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 69
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 托盤
2010 Microchip Technology Inc.
Preliminary
DS39964B-page 549
PIC18F47J53 FAMILY
TABLE 31-27: MSSPx I2C BUS DATA REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max
Units
Conditions
100
THIGH
Clock High Time 100 kHz mode
2(TOSC)(BRG + 1)
s
400 kHz mode
2(TOSC)(BRG + 1)
s
1 MHz mode(1)
2(TOSC)(BRG + 1)
s
101
TLOW
Clock Low Time 100 kHz mode
2(TOSC)(BRG + 1)
s
400 kHz mode
2(TOSC)(BRG + 1)
s
1 MHz mode(1)
2(TOSC)(BRG + 1)
s
102
TR
SDAx and SCLx
Rise Time
100 kHz mode
1000
ns
CB is specified to be
from 10 to 400 pF
400 kHz mode
20 + 0.1 CB
300
ns
1 MHz mode(1)
300
ns
103
TF
SDAx and SCLx
Fall Time
100 kHz mode
300
ns
CB is specified to be
from 10 to 400 pF
400 kHz mode
20 + 0.1 CB
300
ns
1 MHz mode(1)
100
ns
90
TSU:STA Start Condition
Setup Time
100 kHz mode
2(TOSC)(BRG + 1)
s
Only relevant for
Repeated Start condition
400 kHz mode
2(TOSC)(BRG + 1)
s
1 MHz mode(1)
2(TOSC)(BRG + 1)
s
91
THD:STA Start Condition
Hold Time
100 kHz mode
2(TOSC)(BRG + 1)
s
After this period, the first
clock pulse is generated
400 kHz mode
2(TOSC)(BRG + 1)
s
1 MHz mode(1)
2(TOSC)(BRG + 1)
s
106
THD:DAT Data Input
Hold Time
100 kHz mode
0
ns
400 kHz mode
0
0.9
s
1 MHz mode(1)
TBD
ns
107
TSU:DAT Data Input
Setup Time
100 kHz mode
250
ns
(Note 2)
400 kHz mode
100
ns
1 MHz mode(1)
TBD
ns
92
TSU:STO Stop Condition
Setup Time
100 kHz mode
2(TOSC)(BRG + 1)
s
400 kHz mode
2(TOSC)(BRG + 1)
s
1 MHz mode(1)
2(TOSC)(BRG + 1)
s
109
TAA
Output Valid
from Clock
100 kHz mode
3500
ns
400 kHz mode
1000
ns
1 MHz mode(1)
——
ns
110
TBUF
Bus Free Time
100 kHz mode
4.7
s
Time the bus must be
free before a new
transmission can start
400 kHz mode
1.3
s
1 MHz mode(1)
TBD
s
D102
CB
Bus Capacitive Loading
400
pF
Legend: TBD = To Be Determined
Note 1: Maximum pin capacitance = 10 pF for all I2C pins.
2: A Fast mode I2C bus device can be used in a Standard mode I2C bus system, but parameter
250 ns must then be met. This will automatically be the case if the device does not stretch the LOW
period of the SCLx signal. If such a device does stretch the LOW period of the SCLx signal, it must output
the next data bit to the SDAx line, parameter #102 + parameter #107 = 1000 + 250 = 1250 ns (for 100 kHz
mode), before the SCLx line is released.
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