
PIC18F8722 FAMILY
DS39646B-page 60
Preliminary
2004 Microchip Technology Inc.
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
MEMCON
OSCTUNE
TRISJ
TRISH
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
(5)
LATJ
LATH
LATG
LATF
LATE
LATD
LATC
LATB
LATA
(5)
PORTJ
PORTH
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
Legend:
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1111 1111
1111 1111
uuuu uuuu
uuuu uuuu
(1)
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
11-1 1111
11-1 1111
uu-u uuuu
uu-u uuuu
(1)
00-0 0000
00-0 0000
00-0 0000
00-0 0000
uu-u uuuu
1111 1111
1111 1111
uuuu uuuu
uuuu uuuu
(1)
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
0-00 --00
0-00 --00
u-uu --uu
00-0 0000
00-0 0000
uu-u uuuu
1111 1111
1111 1111
uuuu uuuu
1111 1111
1111 1111
uuuu uuuu
---1 1111
---1 1111
---u uuuu
1111 1111
1111 1111
uuuu uuuu
1111 1111
1111 1111
uuuu uuuu
1111 1111
1111 1111
uuuu uuuu
1111 1111
1111 1111
uuuu uuuu
1111 1111
1111 1111
(5)
1111 1111
1111 1111
(5)
uuuu uuuu
uuuu uuuu
(5)
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
--xx xxxx
--uu uuuu
--uu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
xxxx xxxx
(5)
uuuu uuuu
uuuu uuuu
(5)
uuuu uuuu
uuuu uuuu
(5)
xxxx xxxx
uuuu uuuu
uuuu uuuu
0000 xxxx
uuuu uuuu
uuuu uuuu
--xx xxxx
--uu uuuu
--uu uuuu
x000 0000
u000 0000
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
TABLE 4-4:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET
Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
u
= unchanged,
x
= unknown,
-
= unimplemented bit, read as ‘
0
’,
q
= value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled
as PORTA pins, they are disabled and read ‘
0
’.
Note
1:
2:
3:
4:
5: