2007 Microchip Technology Inc.
Preliminary
DS39778B-page 441
PIC18F87J11 FAMILY
Resets...............................................................................313
Brown-out Reset (BOR)............................................313
Oscillator Start-up Timer (OST) ................................313
Power-on Reset (POR).............................................313
Power-up Timer (PWRT) ..........................................313
RETFIE .............................................................................360
RETLW .............................................................................360
RETURN...........................................................................361
Revision History................................................................429
RLCF.................................................................................361
RLNCF..............................................................................362
RRCF................................................................................362
RRNCF .............................................................................363
S
SCKx.................................................................................223
SDIx ..................................................................................223
SDOx ................................................................................223
SEC_IDLE Mode.................................................................46
SEC_RUN Mode.................................................................42
Serial Clock, SCKx............................................................223
Serial Data In (SDIx).........................................................223
Serial Data Out (SDOx) ....................................................223
Serial Peripheral Interface. See SPI Mode.
SETF.................................................................................363
Slave Select (SSx)............................................................223
SLEEP ..............................................................................364
Software Simulator (MPLAB SIM).....................................380
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ............................................313
Special Function Registers
Shared Registers........................................................74
SPI Mode (MSSP).............................................................223
Associated Registers................................................232
Bus Mode Compatibility............................................231
Clock Speed, Interactions.........................................231
Effects of a Reset......................................................231
Enabling SPI I/O .......................................................227
Master Mode.............................................................228
Master/Slave Connection..........................................227
Operation ..................................................................226
Operation in Power-Managed Modes.......................231
Serial Clock...............................................................223
Serial Data In ............................................................223
Serial Data Out .........................................................223
Slave Mode...............................................................229
Slave Select..............................................................223
Slave Select Synchronization ...................................229
SPI Clock..................................................................228
SSPxBUF Register ...................................................228
SSPxSR Register......................................................228
Typical Connection ...................................................227
SSPOV..............................................................................259
SSPOV Status Flag ..........................................................259
SSPxSTAT Register
R/W Bit..............................................................238, 241
SSx ...................................................................................223
Stack Full/Underflow Resets...............................................67
SUBFSR ...........................................................................375
SUBFWB...........................................................................364
SUBLW .............................................................................365
SUBULNK.........................................................................375
SUBWF.............................................................................365
SUBWFB...........................................................................366
SWAPF .............................................................................366
T
Table Pointer Operations (table)......................................... 90
Table Reads/Table Writes.................................................. 67
TBLRD.............................................................................. 367
TBLWT ............................................................................. 368
Timer0 .............................................................................. 181
Associated Registers................................................ 183
Operation.................................................................. 182
Overflow Interrupt..................................................... 183
Prescaler .................................................................. 183
Switching Assignment ...................................... 183
Prescaler Assignment (PSA Bit)............................... 183
Prescaler Select (T0PS2:T0PS0 Bits)...................... 183
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode............................. 182
Source Edge Select (T0SE Bit) ................................ 182
Source Select (T0CS Bit) ......................................... 182
Timer1 .............................................................................. 185
16-Bit Read/Write Mode ........................................... 187
Associated Registers................................................ 189
Considerations in Asynchronous
Counter Mode................................................... 188
Interrupt .................................................................... 188
Operation.................................................................. 186
Oscillator........................................................... 185, 187
Layout Considerations...................................... 187
Oscillator, as Secondary Clock................................... 33
Resetting, Using the ECCPx
Special Event Trigger....................................... 188
Special Event Trigger (ECCP).................................. 210
TMR1H Register....................................................... 185
TMR1L Register ....................................................... 185
Use as a Clock Source............................................. 187
Use as a Real-Time Clock........................................ 188
Timer2 .............................................................................. 191
Associated Registers................................................ 192
Interrupt .................................................................... 192
Operation.................................................................. 191
Output....................................................................... 192
PR2 Register............................................................ 211
TMR2 to PR2 Match Interrupt................................... 211
Timer3 .............................................................................. 193
16-Bit Read/Write Mode ........................................... 195
Associated Registers................................................ 195
Operation.................................................................. 194
Oscillator........................................................... 193, 195
Overflow Interrupt............................................. 193, 195
Special Event Trigger (ECCPx)................................ 195
TMR3H Register....................................................... 193
TMR3L Register ....................................................... 193
Timer4 .............................................................................. 197
Associated Registers................................................ 198
Operation.................................................................. 197
Output....................................................................... 198
Postscaler. See Postscaler, Timer4.
PR4 Register............................................................ 197
Prescaler. See Prescaler, Timer4.
TMR4 Register ......................................................... 197
TMR4 to PR4 Match Interrupt........................... 197, 198