參數(shù)資料
型號(hào): PIC18F6722T-E/PT
廠(chǎng)商: Microchip Technology
文件頁(yè)數(shù): 9/16頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 64KX16 64TQFP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
標(biāo)準(zhǔn)包裝: 1,200
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 25MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 54
程序存儲(chǔ)器容量: 128KB(64K x 16)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 64-TQFP
包裝: 帶卷 (TR)
配用: MA180020-ND - MODULE PLUG-IN HPC EXPL 18F87J11
PIC18F6627/6722/8627/8722
DS80221C-page 2
2006 Microchip Technology Inc.
4.
Module: A/D
The A/D offset is greater than the specified limit in
Table 28-26 of the Device Data Sheet. The
updated conditions and limits are shown in bold
text in Table 1.
Work around
Three work arounds exist:
1. Configure the A/D to use the VREF+ and VREF-
pins for the voltage references. This is done by
setting the VCFG<1:0> bits (ADCON1<5:4>).
2. Perform a conversion on a known voltage
reference voltage and adjust the A/D result in
software.
3. Increase system clock speed and adjust A/D
settings accordingly. Higher system clock
frequencies decrease offset error.
Date Codes that pertain to this issue:
All engineering and production devices.
TABLE 1:
A/D CONVERTER CHARACTERISTICS:
PIC18F6X27/6X22/8X27/8X22 (INDUSTRIAL, EXTENDED)
PIC18LF6X27/6X22/8X27/8X22 (INDUSTRIAL)
5.
Module: MSSP
I2C Receive mode should be enabled (i.e.,
RCEN bit should be set) only when the system is
idle (i.e., ACKEN, RCEN, PEN, RSEN and SEN all
equal zero). It should not be possible to set the
RCEN bit when the system is not idle; however,
the RCEN bit
can be set under this circumstance.
Work around
Wait for the system to become idle before setting
the RCEN bit. This requires a check for the
following bits to be clear: ACKEN, RCEN, PEN,
RSEN and SEN.
Date Codes that pertain to this issue:
All engineering and production devices.
6.
Module: ECCP
When switching direction in Full-Bridge PWM
mode, the modulated outputs will switch immedi-
ately instead of waiting for the next PWM cycle.
This may generate unexpected short pulses on the
modulated outputs.
Work around
Disable the PWM or set duty cycle to zero prior to
switching directions.
Date Codes that pertain to this issue:
All engineering and production devices.
Param
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
A06A
EOFF
Offset Error
±1.5
LSb
VREF = VREF+ and VREF-
A06
EOFF
Offset Error
——
±3.5
LSb
VREF = VSS and VDD
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