參數(shù)資料
型號(hào)： PIC18F66J90-I/PT
廠商： Microchip Technology
文件頁(yè)數(shù)： 36/59頁(yè)
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 64KB 64-TQFP
產(chǎn)品培訓(xùn)模塊： PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 160
系列： PIC® 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 48MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，LCD，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 51
程序存儲(chǔ)器容量： 64KB（32K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 3.8K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 644 (CN2011-ZH PDF)
配用： AC162079-ND - HEADER MPLAB ICD2 18F85J90 64/80
AC164328-ND - MODULE SKT FOR 80TQFP
2010 Microchip Technology Inc.
DS39933D-page 41
PIC18F87J90 FAMILY
3.5
Internal Oscillator Block
The PIC18F87J90 family of devices includes an
internal oscillator block which generates two different
clock signals; either can be used as the micro-
controller’s clock source. This may eliminate the need
for an external oscillator circuit on the OSC1 and/or
OSC2 pins.
The main output is the Fast RC oscillator or INTOSC,
an 8 MHz clock source which can be used to directly
drive the device clock. It also drives a postscaler, which
can provide a range of clock frequencies from 31 kHz
to 4 MHz. INTOSC is enabled when a clock frequency
from 125 kHz to 8 MHz is selected. The INTOSC out-
put can also be enabled when 31 kHz is selected,
depending on the INTSRC bit (OSCTUNE<7>).
The other clock source is the Internal RC oscillator
(INTRC), which provides a nominal 31 kHz output.
INTRC is enabled if it is selected as the device clock
source; it is also enabled automatically when any of the
following are enabled:
Power-up Timer
Fail-Safe Clock Monitor
Watchdog Timer
Two-Speed Start-up
These features are discussed in greater detail in
The clock source frequency (INTOSC direct, INTOSC
with postscaler or INTRC direct) is selected by config-
uring the IRCF bits of the OSCCON register. The
default frequency on device Resets is 4 MHz.
3.5.1
INTIO MODES
Using the internal oscillator as the clock source elimi-
nates the need for up to two external oscillator pins,
which can then be used for digital I/O. Two distinct
oscillator configurations, which are determined by the
FOSC Configuration bits, are available:
In INTIO1 mode, the OSC2 pin outputs FOSC/4,
while OSC1 functions as RA7 (see Figure 3-6) for
digital input and output.
In INTIO2 mode, OSC1 functions as RA7 and
OSC2 functions as RA6 (see Figure 3-7), both for
digital input and output.
FIGURE 3-6:
INTIO1 OSCILLATOR MODE
FIGURE 3-7:
INTIO2 OSCILLATOR MODE
3.5.2
INTPLL MODES
The 4x Phase Locked Loop (PLL) can be used with the
internal oscillator block to produce faster device clock
speeds than are normally possible with the internal
oscillator sources. When enabled, the PLL produces a
clock speed of 16 MHz or 32 MHz.
PLL operation is controlled through software. The con-
trol bit, PLLEN (OSCTUNE<6>), is used to enable or
disable its operation. The PLL is available only to
INTOSC when the device is configured to use one of
the INTPLL modes as the primary clock source
(FOSC<2:0> = 011 or 001). Additionally, the PLL will
only function when the selected output frequency is
either 4 MHz or 8 MHz (OSCCON<6:4> = 111 or 110).
Like the INTIO modes, there are two distinct INTPLL
modes available:
In INTPLL1 mode, the OSC2 pin outputs FOSC/4,
while OSC1 functions as RA7 for digital input and
output. Externally, this is identical in appearance
to INTIO1 (Figure 3-6).
In INTPLL2 mode, OSC1 functions as RA7 and
OSC2 functions as RA6, both for digital input and
output. Externally, this is identical to INTIO2
OSC2
FOSC/4
I/O (OSC1)
RA7
PIC18F87J90
I/O (OSC2)
RA6
I/O (OSC1)
RA7
PIC18F87J90
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