PIC18F87J11 FAMILY
DS39778B-page 440
Preliminary
2007 Microchip Technology Inc.
PUSH and POP Instructions...............................................66
PUSHL..............................................................................374
PWM (CCP Module)
Associated Registers ................................................206
Duty Cycle.................................................................204
Example Frequencies/Resolutions ...........................205
Operation Setup........................................................205
Period........................................................................204
PR2/PR4 Registers...................................................204
TMR2 (TMR4) to PR2 (PR4) Match..........................204
TMR2 to PR2 Match .................................................211
TMR4 to PR4 Match .................................................197
PWM (ECCP Module).......................................................211
CCPR1H:CCPR1L Registers....................................211
Direction Change in Full-Bridge
Output Mode.....................................................216
Duty Cycle.................................................................212
Effects of a Reset......................................................221
Enhanced PWM Auto-Shutdown ..............................218
Example Frequencies/Resolutions ...........................212
Full-Bridge Mode.......................................................215
Full-Bridge Output Application Example ...................216
Half-Bridge Mode......................................................214
Half-Bridge Output Mode
Applications Example........................................214
Output Configurations...............................................212
Output Relationships (Active-High)...........................213
Output Relationships (Active-Low)............................213
Period........................................................................211
Programmable Dead-Band Delay.............................218
Setup for PWM Operation.........................................221
Start-up Considerations ............................................219
Q
Q Clock .....................................................................205, 212
R
RAM. See Data Memory.
RC_IDLE Mode...................................................................47
RC_RUN Mode ...................................................................44
RCALL...............................................................................359
RCON Register
Bit Status During Initialization .....................................54
Reader Response.............................................................432
Reference Clock Output......................................................38
Register File........................................................................72
Register File Summary..................................................75–79
Registers
ADCON0 (A/D Control 0)..........................................291
ADCON0 (A/D Control 1)..........................................292
ANCON0 (A/D Port Configuration 2).........................293
ANCON1 (A/D Port Configuration 1).........................293
BAUDCONx (Baud Rate Control) .............................272
CCPxCON (Capture/Compare/PWM
Control).............................................................199
CCPxCON (ECCPx Control).....................................207
CMSTAT (Comparator Output Status)......................303
CMxCON (Comparatorx Control)..............................302
CONFIG1H (Configuration 1 High) ...........................315
CONFIG1L (Configuration 1 Low).............................315
CONFIG2H (Configuration 2 High) ...........................317
CONFIG3H (Configuration 3 High) ...........................319
CONFIG3L (Configuration 3 Low).......................63, 318
CVRCON (Comparator Voltage
Reference Control)............................................310
DEVID1 (Device ID 1)...............................................320
DEVID2 (Device ID 2)............................................... 320
ECCPxAS (ECCPx Auto-Shutdown Control)............ 219
ECCPxDEL (ECCPx PWM Delay)............................ 218
EECON1 (EEPROM Control 1) .................................. 89
INTCON (Interrupt Control)....................................... 113
INTCON2 (Interrupt Control 2).................................. 114
INTCON3 (Interrupt Control 3).................................. 115
IPR1 (Peripheral Interrupt Priority 1) ........................ 122
IPR2 (Peripheral Interrupt Priority 2) ........................ 123
IPR3 (Peripheral Interrupt Priority 3) ........................ 124
MEMCON (External Memory Bus Control)................. 98
ODCON1 (Peripheral Open-Drain Control 1) ........... 129
ODCON2 (Peripheral Open-Drain Control 2) ........... 129
ODCON3 (Peripheral Open-Drain Control 3) ........... 129
OSCCON (Oscillator Control)..................................... 32
OSCTUNE (Oscillator Tuning).................................... 33
PADCFG1 (I/O Pad Configuration Control).............. 130
PIE1 (Peripheral Interrupt Enable 1)......................... 119
PIE2 (Peripheral Interrupt Enable 2)......................... 120
PIE3 (Peripheral Interrupt Enable 3)......................... 121
PIR1 (Peripheral Interrupt Request (Flag) 1)............ 116
PIR2 (Peripheral Interrupt Request (Flag) 2)............ 117
PIR3 (Peripheral Interrupt Request (Flag) 3)............ 118
PMADDRH (Parallel Port Address High
Byte, Master Mode Only).................................. 164
PMCONH (Parallel Port Control High Byte).............. 158
PMCONL (Parallel Port Control Low Byte)............... 159
PMEH (Parallel Port Enable High Byte).................... 161
PMEL (Parallel Port Enable Low Byte)..................... 162
PMMODEH (Parallel Port Mode High Byte) ............. 160
PMMODEL (Parallel Port Mode Low Byte)............... 161
PMSTAT (Parallel Port Status High Byte) ................ 162
PMSTAT (Parallel Port Status Low Byte)................. 163
RCON (Reset Control)........................................ 50, 125
RCSTAx (Receive Status and Control)..................... 271
REFOCON (Reference Oscillator Control)................. 39
SSPCON2 (MSSPx Control 2, I
2
C
Master Mode) ................................................... 236
SSPCON2 (MSSPx Control 2, I
2
C
Slave Mode) ..................................................... 237
SSPxCON1 (MSSPx Control 1, I
2
C Mode)............... 235
SSPxCON1 (MSSPx Control 1, SPI Mode).............. 225
SSPxMSK (I
2
C Slave Address Mask)....................... 237
SSPxSTAT (MSSPx Status, I
2
C Mode).................... 234
SSPxSTAT (MSSPx Status, SPI Mode)................... 224
STATUS ..................................................................... 80
STKPTR (Stack Pointer)............................................. 66
T0CON (Timer0 Control) .......................................... 181
T1CON (Timer1 Control) .......................................... 185
T2CON (Timer2 Control) .......................................... 191
T3CON (Timer3 Control) .......................................... 193
T4CON (Timer4 Control) .......................................... 197
TXSTAx (Transmit Status and Control).................... 270
WDTCON (Watchdog Timer Control)................. 74, 322
RESET.............................................................................. 359
Reset .................................................................................. 49
Brown-out Reset (BOR).............................................. 49
Configuration Mismatch (CM)..................................... 49
MCLR Reset, During Power-Managed Modes ........... 49
MCLR Reset, Normal Operation................................. 49
Power-on Reset (POR)............................................... 49
RESET Instruction...................................................... 49
Stack Full Reset.......................................................... 49
Stack Underflow Reset............................................... 49
Watchdog Timer (WDT) Reset ................................... 49