參數(shù)資料
型號: PIC18F6520-I/PT
廠商: Microchip Technology
文件頁數(shù): 36/165頁
文件大?。?/td> 0K
描述: IC MCU FLASH 16KX16 EEPROM64TQFP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準包裝: 160
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 52
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 643 (CN2011-ZH PDF)
配用: XLT64PT5-ND - SOCKET TRAN ICE 64MQFP/TQFP
AC164319-ND - MODULE SKT MPLAB PM3 64TQFP
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 128
2004 Microchip Technology Inc.
10.10 Parallel Slave Port
PORTD also operates as an 8-bit wide Parallel Slave
Port,
or
microprocessor
port,
when
control
bit
PSPMODE (PSPCON<4>) is set. It is asynchronously
readable and writable by the external world through the
RD control input pin, RE0/RD/AD8 and the WR control
input pin, RE1/WR/AD9.
The PSP can directly interface to an 8-bit micro-
processor data bus. The external microprocessor can
read or write the PORTD latch as an 8-bit latch. Setting
bit PSPMODE enables port pin RE0/RD/AD8 to be the
RD input, RE1/WR/AD9 to be the WR input and RE2/
CS/AD10 to be the CS (Chip Select) input. For this
functionality, the corresponding data direction bits of
the TRISE register (TRISE<2:0>) must be configured
as inputs (set). The A/D port configuration bits,
PCFG2:PCFG0 (ADCON1<2:0>), must be set which
will configure pins RE2:RE0 as digital I/O.
A write to the PSP occurs when both the CS and WR
lines are first detected low. A read from the PSP occurs
when both the CS and RD lines are first detected low.
The PORTE I/O pins become control inputs for the
microprocessor
port
when
bit
PSPMODE
(PSPCON<4>) is set. In this mode, the user must make
sure that the TRISE<2:0> bits are set (pins are config-
ured as digital inputs) and the ADCON1 is configured
for digital I/O. In this mode, the input buffers are TTL.
FIGURE 10-23:
PORTD AND PORTE
BLOCK DIAGRAM
(PARALLEL SLAVE PORT)
Note:
For PIC18F8X20 devices, the Parallel
Slave
Port
is
available
only
in
Microcontroller mode.
Data Bus
WR LATD
RDx
Q
D
CK
EN
QD
EN
RD PORTD
pin
One bit of PORTD
Set Interrupt Flag
PSPIF (PIR1<7>)
Read
Chip Select
Write
RD
CS
WR
Note: I/O pin has protection diodes to VDD and VSS.
TTL
or
PORTD
RD LATD
Data Latch
TRIS Latch
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