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2007 Microchip Technology Inc.
Preliminary
DS39761B-page 473
PIC18F2682/2685/4682/4685
RC6/TX/CK ..........................................................15, 19
RC7/RX/DT ..........................................................15, 19
RD0/PSP0/C1IN+ ......................................................20
RD1/PSP1/C1IN- .......................................................20
RD2/PSP2/C2IN+ ......................................................20
RD3/PSP3/C2IN- .......................................................20
RD4/PSP4/ECCP1/P1A .............................................20
RD5/PSP5/P1B ..........................................................20
RD6/PSP6/P1C ..........................................................20
RD7/PSP7/P1D ..........................................................20
RE0/RD/AN5 ..............................................................21
RE1/WR/AN6/C1OUT ................................................21
RE2/CS/AN7/C2OUT .................................................21
V
DD
......................................................................15, 21
V
SS
.......................................................................15, 21
Pinout I/O Descriptions
PIC18F2682/2685 ......................................................12
PIC18F4682/4685 ......................................................16
PIR Registers ...................................................................118
PLL Frequency Multiplier ...................................................25
HSPLL Oscillator Mode ..............................................25
INTOSC Modes ..........................................................26
Use with INTOSC .......................................................25
PLL Lock Time-out .............................................................45
POP .................................................................................392
POR. See Power-on Reset.
PORTA
Associated Registers ...............................................131
I/O Summary ............................................................130
LATA Register ..........................................................129
PORTA Register ......................................................129
TRISA Register ........................................................129
PORTB
Associated Registers ...............................................134
I/O Summary ............................................................133
LATB Register ..........................................................132
PORTB Register ......................................................132
RB7:RB4 Interrupt-on-Change Flag
(RBIF Bit) .........................................................132
TRISB Register ........................................................132
PORTC
Associated Registers ...............................................137
I/O Summary ............................................................136
LATC Register .........................................................135
PORTC Register ......................................................135
RC3/SCK/SCL Pin ...................................................201
TRISC Register ........................................................135
PORTD
Associated Registers ...............................................140
I/O Summary ............................................................139
LATD Register .........................................................138
Parallel Slave Port (PSP) Function ..........................138
PORTD Register ......................................................138
TRISD Register ........................................................138
PORTE
Associated Registers ...............................................143
I/O Summary ............................................................143
LATE Register ..........................................................141
PORTE Register ......................................................141
PSP Mode Select (PSPMODE Bit) ..........................138
TRISE Register ........................................................141
Postscaler, WDT
Assignment (PSA Bit) ..............................................149
Rate Select (T0PS2:T0PS0 Bits) .............................149
Switching Between Timer0 and WDT ......................149
Power-Managed Modes ..................................................... 33
Clock Sources ........................................................... 33
Clock Transitions and Status Indicators .................... 34
Entering ..................................................................... 33
Exiting Idle and Sleep Modes .................................... 39
By Interrupt ........................................................ 39
By Reset ............................................................ 39
By WDT Time-out .............................................. 39
Without an Oscillator Start-up Delay ................. 40
Idle Modes ................................................................. 37
PRI_IDLE .......................................................... 38
RC_IDLE ........................................................... 39
SEC_IDLE ......................................................... 38
Multiple Sleep Commands ......................................... 34
Run Modes ................................................................ 34
PRI_RUN ........................................................... 34
RC_RUN ............................................................ 35
SEC_RUN ......................................................... 34
Selecting .................................................................... 33
Sleep Mode ............................................................... 37
Summary (table) ........................................................ 33
Power-on Reset (POR) ...................................................... 43
Power-up Timer (PWRT) ........................................... 45
Time-out Sequence ................................................... 45
Power-up Delays ............................................................... 31
Power-up Timer (PWRT) ............................................. 31, 45
Prescaler
Timer2 ..................................................................... 176
Prescaler, Timer0 ............................................................ 149
Assignment (PSA Bit) .............................................. 149
Rate Select (T0PS2:T0PS0 Bits) ............................. 149
Switching Between Timer0 and WDT ...................... 149
Prescaler, Timer2 ............................................................ 170
PRI_IDLE Mode ................................................................. 38
PRI_RUN Mode ................................................................. 34
Program Counter ............................................................... 62
PCL, PCH and PCU Registers .................................. 62
PCLATH and PCLATU Registers .............................. 62
Program Memory
Code Protection ....................................................... 359
Extended Instruction Set ........................................... 91
Instructions ................................................................ 66
Two-Word .......................................................... 66
Interrupt Vector .......................................................... 61
Look-up Tables .......................................................... 64
Map and Stack (diagram) .......................................... 61
Reset Vector .............................................................. 61
Program Verification and Code Protection ...................... 358
Associated Registers ............................................... 359
Programming, Device Instructions ................................... 363
PSP. See Parallel Slave Port.
Pulse-Width Modulation. See PWM (CCP1/ECCP1 Modules).
PUSH ............................................................................... 392
PUSH and POP Instructions .............................................. 63
PUSHL ............................................................................. 408
PWM (CCP1 Module)
Associated Registers ............................................... 171
CCPR1H:CCPR1L Registers .................................. 169
Duty Cycle ............................................................... 169
Example Frequencies/Resolutions .......................... 170
Period ...................................................................... 169
Setup for PWM Operation ....................................... 170
TMR2 to PR2 Match ................................................ 169