參數(shù)資料
型號(hào): PIC18F4685-I/ML
廠商: Microchip Technology
文件頁(yè)數(shù): 161/183頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 48KX16 44QFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 45
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 96KB(48K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 3.25K x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 11x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤(pán)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 646 (CN2011-ZH PDF)
配用: XLT44QFN2-ND - SOCKET TRAN ICE 44QFN/40DIP
AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
I3-DB18F4680-ND - BOARD DAUGHTER ICEPIC3
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)當(dāng)前第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)
2011 Microchip Technology Inc.
DS39931D-page 79
PIC18F46J50 FAMILY
6.1.3
PROGRAM COUNTER
The Program Counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 21 bits wide
and is contained in three separate 8-bit registers. The
low byte, known as the PCL register, is both readable
and writable. The high byte, or PCH register, contains
the PC<15:8> bits; it is not directly readable or writable.
Updates to the PCH register are performed through the
PCLATH register. The upper byte is called PCU. This
register contains the PC<20:16> bits; it is also not
directly readable or writable. Updates to the PCU
register are performed through the PCLATU register.
The contents of PCLATH and PCLATU are transferred
to the Program Counter by any operation that writes to
PCL. Similarly, the upper 2 bytes of the Program
Counter are transferred to PCLATH and PCLATU by an
operation that reads PCL. This is useful for computed
offsets to the PC (see Section 6.1.6.1 “Computed
The PC addresses bytes in the program memory. To
prevent the PC from becoming misaligned with word
instructions, the Least Significant bit (LSb) of PCL is
fixed to a value of ‘0’. The PC increments by two to
address sequential instructions in the program
memory.
The CALL, RCALL, GOTO and program branch
instructions write to the Program Counter directly. For
these instructions, the contents of PCLATH and
PCLATU are not transferred to the Program Counter.
6.1.4
RETURN ADDRESS STACK
The return address stack allows any combination of up
to 31 program calls and interrupts to occur. The PC is
pushed onto the stack when a CALL or RCALL instruc-
tion is executed, or an interrupt is Acknowledged. The
PC value is pulled off of the stack on a RETURN,
RETLW
or a RETFIE instruction (and on ADDULNK and
SUBULNK
instructions if the extended instruction set is
enabled). PCLATU and PCLATH are not affected by
any of the RETURN or CALL instructions.
The stack operates as a 31-word by 21-bit RAM and a
5-bit Stack Pointer (SP), STKPTR. The stack space is
not part of either program or data space. The Stack
Pointer is readable and writable and the address on the
top of the stack is readable and writable through the
Top-of-Stack Special Function Registers (SFRs). Data
can also be pushed to, or popped from the stack, using
these registers.
A CALL type instruction causes a push onto the stack.
The Stack Pointer is first incremented and the location
pointed to by the Stack Pointer is written with the
contents of the PC (already pointing to the instruction
following the CALL). A RETURN type instruction causes
a pop from the stack. The contents of the location
pointed to by the STKPTR are transferred to the PC
and then the Stack Pointer is decremented.
The Stack Pointer is initialized to ‘00000’ after all
Resets. There is no RAM associated with the location
corresponding to a Stack Pointer value of ‘00000’; this
is only a Reset value. Status bits indicate if the stack is
full, has overflowed or has underflowed.
6.1.4.1
Top-of-Stack Access
Only the top of the return address stack (TOS) is read-
able and writable. A set of three registers,
TOSU:TOSH:TOSL, holds the contents of the stack
location
pointed
to
by
the
STKPTR
register
(Figure 6-3). This allows users to implement a software
stack if necessary. After a CALL, RCALL or interrupt
(and ADDULNK and SUBULNK instructions if the
extended instruction set is enabled), the software can
read
the
pushed
value
by
reading
the
TOSU:TOSH:TOSL registers. These values can be
placed on a user-defined software stack. At return time,
the
software
can
return
these
values
to
TOSU:TOSH:TOSL and do a return.
The user must disable the Global Interrupt Enable bits
while accessing the stack to prevent inadvertent stack
corruption.
FIGURE 6-3:
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
00011
001A34h
11111
11110
11101
00010
00001
00000
00010
Return Address Stack <20:0>
Top-of-Stack
000D58h
TOSL
TOSH
TOSU
34h
1Ah
00h
STKPTR<4:0>
Top-of-Stack Registers
Stack Pointer
相關(guān)PDF資料
PDF描述
C8051F040 IC 8051 MCU 64K FLASH 100TQFP
PIC16LF877-04I/PT IC PIC MCU FLASH 8KX14 44TQFP
PIC16C64A-20I/L IC MCU OTP 2KX14 PWM 44PLCC
C8051F018 IC 8051 MCU 16K FLASH 64TQFP
DSPIC33EP256MU814-I/PL IC DSC 16BIT 256KB 144LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC18F4685T-I/ML 功能描述:8位微控制器 -MCU 96KB FL 3328bytes- RAM 36I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F4685T-I/PT 功能描述:8位微控制器 -MCU 96KB FL 3328bytes RAM 36I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F46J11-I/ML 功能描述:8位微控制器 -MCU 64KB Flash 4KBRAM 12MIPS nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F46J11-I/PT 功能描述:8位微控制器 -MCU 64KB Flash 4KBRAM 12MIPS nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F46J11T-I/ML 功能描述:8位微控制器 -MCU 64KB Flash 4KBRAM 12MIPS nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT