
PIC17C4X
DS30412C-page 86
1996 Microchip Technology Inc.
13.1
USART Baud Rate Generator (BRG)
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer.
Table 13-1 shows
the formula for computation of the baud rate for differ-
ent USART modes. These only apply when the USART
is in synchronous master mode (internal clock) and
asynchronous mode.
Given the desired baud rate and Fosc, the nearest inte-
ger value between 0 and 255 can be calculated using
the formula below. The error in baud rate can then be
determined.
TABLE 13-1:
BAUD RATE FORMULA
SYNC
Mode
Baud Rate
0
1
Asynchronous
Synchronous
FOSC/(64(X+1))
FOSC/(4(X+1))
X = value in SPBRG (0 to 255)
error for the following conditions:
FOSC = 16 MHz
Desired Baud Rate = 9600
SYNC = 0
EXAMPLE 13-1: CALCULATING BAUD
RATE ERROR
Writing a new value to the SPBRG, causes the BRG
timer to be reset (or cleared), this ensures that the BRG
does not wait for a timer overow before outputting the
new baud rate.
Desired Baud rate=Fosc / (64 (X + 1))
9600 =
16000000 /(64 (X + 1))
X
=
25.042 = 25
Calculated Baud Rate=16000000 / (64 (25 + 1))
=
9615
Error =
(Calculated Baud Rate - Desired Baud Rate)
Desired Baud Rate
=
(9615 - 9600) / 9600
=
0.16%
TABLE 13-2:
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on all
other resets
(Note1)
13h, Bank 0
RCSTA
SPEN
RX9
SREN
CREN
—
FERR
OERR
RX9D
0000 -00x
0000 -00u
15h, Bank 0
TXSTA
CSRC
TX9
TXEN
SYNC
—
TRMT
TX9D
0000 --1x
0000 --1u
17h, Bank 0
SPBRG
Baud rate generator register
xxxx xxxx
uuuu uuuu
Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', shaded cells are not used by the Baud Rate Generator.
Note 1:
Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.