
PIC18F45J10 FAMILY
DS39682C-page 90
Preliminary
2007 Microchip Technology Inc.
8.5
RCON Register
The RCON register contains bits used to determine the
cause of the last Reset or wake-up from Idle or Sleep
modes. RCON also contains the bit that enables
interrupt priorities (IPEN).
REGISTER 8-13:
RCON: RESET CONTROL REGISTER
R/W-0
U-0
IPEN
—
bit 7
U-0
—
R/W-1
RI
R-1
TO
R-1
PD
R/W-0
POR
R/W-0
BOR
bit 0
bit 7
IPEN:
Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented:
Read as ‘
0
’
RI:
RESET
Instruction Flag bit
For details of bit operation, see Register 4-1.
TO:
Watchdog Timer Time-out Flag bit
For details of bit operation, see Register 4-1.
PD:
Power-Down Detection Flag bit
For details of bit operation, see Register 4-1.
POR:
Power-on Reset Status bit
For details of bit operation, see Register 4-1.
BOR:
Brown-out Reset Status bit
For details of bit operation, see Register 4-1.
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown