PIC18FXX8
DS41159B-page 370
Preliminary
2002 Microchip Technology Inc.
BRG.
See
Baud Rate Generator
Brown-out Reset (BOR)
.............................................26
,
261
BSF
..................................................................................289
BTFSC
.............................................................................290
BTFSS
..............................................................................290
BTG
..................................................................................291
BZ
.....................................................................................292
C
CALL
................................................................................292
CAN Module
.....................................................................197
Aborting Transmission
.............................................224
Acknowledge Error
...................................................233
Baud Rate Registers
................................................215
Baud Rate Setting
....................................................229
Bit Error
....................................................................233
Bit Time Partitioning
.................................................229
Bit Timing Configuration Registers
...........................232
Calculating T
Q
, Nominal bit Rate and
Nominal bit Time
..............................................230
Configuration Mode
..................................................222
Control and Status Registers
...................................199
Controller Register Map
...........................................221
CRC Error
................................................................233
Disable Mode
...........................................................222
Error Detection
.........................................................233
Error Modes and Error Counters
..............................233
Error Modes State Diagram
.....................................234
Error States
..............................................................233
Filter Mask Truth (table)
...........................................228
Form Error
................................................................233
Hard Synchronization
...............................................231
I/O Control Register
.................................................217
Information Processing Time
...................................230
Initiating Transmission
.............................................224
Interrupt Acknowledge
.............................................235
Interrupt Registers
....................................................218
Interrupts
..................................................................234
Bus Activity Wake-up
.......................................235
Bus-Off
.............................................................235
Code bits
..........................................................234
Error
.................................................................235
Message Error
.................................................235
Receive
............................................................234
Receiver Bus Passive
......................................235
Receiver Overflow
............................................235
Receiver Warning
............................................235
Transmit
...........................................................234
Transmitter Bus Passive
..................................235
Transmitter Warning
........................................235
Lengthening a bit Period
..........................................231
Listen Only Mode
.....................................................222
Loopback Mode
........................................................223
Message Acceptance Filters and
Masks
....................................................... 212
,
228
Message Acceptance Mask and
Filter Operation
................................................228
Message Reception
.................................................226
Message Reception Flow Chart
...............................227
Message Time-Stamping
.........................................226
Message Transmission
............................................223
Modes of Operation
..................................................222
Normal Mode
............................................................222
Oscillator Tolerance
.................................................232
Overview
..................................................................197
Phase Buffer Segments
...........................................230
Programming Time Segments
................................. 232
Propagation Segment
.............................................. 230
Receive Buffer Registers
......................................... 208
Receive Buffers
....................................................... 226
Receive Message Buffering
..................................... 226
Receive Priority
........................................................ 226
Registers
.................................................................. 199
Resynchronization
................................................... 231
Sample Point
........................................................... 230
Shortening a bit Period
............................................ 232
Stuff Bit Error
........................................................... 233
Synchronization
....................................................... 231
Synchronization Rules
............................................. 231
Synchronization Segment
........................................ 230
Time Quanta
............................................................ 230
Transmit Buffer Registers
........................................ 204
Transmit Buffers
...................................................... 223
Transmit Message Flow Chart
................................. 225
Transmit Priority
....................................................... 223
Transmit/Receive Buffers
........................................ 197
Values for ICODE (table)
......................................... 235
Capture (CCP Module)
.................................................... 122
CAN Message Time-Stamp
..................................... 123
CCP Pin Configuration
............................................. 122
CCPR1H:CCPR1L Registers
................................... 122
Software Interrupt
.................................................... 123
Timer1/Timer3 Mode Selection
................................ 122
Capture (ECCP Module)
.................................................. 131
CAN Message Time-Stamp
..................................... 131
Capture/Compare/PWM (CCP)
........................................ 121
Capture Mode.
See
Capture (CCP Module)
CCP1 Module
.......................................................... 122
CCPR1H Register
.................................................... 122
CCPR1L Register
.................................................... 122
Compare Mode.
See
Compare (CCP Module)
Interaction of CCP1 and ECCP1 Modules
............... 122
PWM Mode.
See
PWM (CCP Module)
Timer Resources
..................................................... 122
Ceramic Resonators
Ranges Tested
.......................................................... 17
Clocking Scheme
............................................................... 41
CLRF
............................................................................... 293
CLRWDT
.......................................................................... 293
Code Examples
16 x 16 Signed Multiply Routine
................................ 76
16 x 16 Unsigned Multiply Routine
............................ 76
8 x 8 Signed Multiply Routine
.................................... 75
8 x 8 Unsigned Multiply Routine
................................ 75
Changing Between Capture Prescalers
................... 123
Data EEPROM Read
................................................. 61
Data EEPROM Refresh Routine
................................ 62
Data EEPROM Write
................................................. 61
Erasing a FLASH Program Memory Row
.................. 70
Fast Register Stack
................................................... 40
How to Clear RAM (Bank 1) Using
Indirect Addressing
............................................ 55
Initializing PORTA
...................................................... 93
Initializing PORTB
...................................................... 95
Initializing PORTC
..................................................... 98
Initializing PORTD
................................................... 100
Initializing PORTE
.................................................... 102
Loading the SSPBUF Register
................................ 144
Reading a FLASH Program Memory Word
............... 69
Saving STATUS, WREG and
BSR Registers in RAM
...................................... 92